PIC24FJ128GA010_09 Datasheet, PDF (171/240 Pages) Microchip Technology – 64/80/100-Pin General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
REGISTER 19-1: CRCCON: CRC CONTROL REGISTER
U-0
U-0
R/W-0
R-0
R-0
—
—
CSIDL
VWORD4 VWORD3
bit 15
R-0
VWORD2
R-0
VWORD1
R-0
VWORD0
bit 8
R-0
R-1
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CRCFUL CRCMPT
—
CRCGO
PLEN3
PLEN2
PLEN1
PLEN0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13
bit 12-8
bit 7
bit 6
bit 5
bit 4
bit 3-0
Unimplemented: Read as ‘0’
CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
VWORD4:VWORD0: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN3:PLEN0 > 7,
or 16 when PLEN3:PLEN0 ≤ 7.
CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
CRCMPT: FIFO Empty bit
1 = FIFO is empty
0 = FIFO is not empty
Unimplemented: Read as ‘0’
CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = CRC serial shifter turned off
PLEN3:PLEN0: Polynomial Length bits
Denotes the length of the polynomial to be generated minus 1.
19.4 Operation in Power Save Modes
19.4.1 SLEEP MODE
If Sleep mode is entered while the module is operating,
the module will be suspended in its current state until
clock execution resumes.
19.4.2 IDLE MODE
To continue full module operation in Idle mode, the
CSIDL bit must be cleared prior to entry into the mode.
If CSIDL = 1, the module will behave the same way as
it does in Sleep mode; pending interrupt events will be
passed on, even though the module clocks are not
available.
© 2009 Microchip Technology Inc.
DS39747E-page 171