PIC24FJ128GA010_09 Datasheet, PDF (117/240 Pages) Microchip Technology – 64/80/100-Pin General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
13.4 Pulse-Width Modulation Mode
The following steps should be taken when configuring
the output compare module for PWM operation:
1. Set the PWM period by writing to the selected
Timer Period register (PRy).
2. Set the PWM duty cycle by writing to the OCxRS
register.
3. Write the OCxR register with the initial duty
cycle.
4. Enable interrupts, if required, for the timer and
output compare modules. The output compare
interrupt is required for PWM Fault pin
utilization.
5. Configure the output compare module for one of
two PWM operation modes by writing to the
Output Compare mode bits OCM<2:0>
(OCxCON<2:0>).
6. Set the TMRy prescale value and enable the
time base by setting TON (TxCON<15>) = 1.
Note:
The OCxR register should be initialized
before the output compare module is first
enabled. The OCxR register becomes a
Read-Only Duty Cycle register when the
module is operated in the PWM modes.
The value held in OCxR will become the
PWM duty cycle for the first PWM period.
The contents of the Duty Cycle Buffer
register, OCxRS, will not be transferred
into OCxR until a time base period match
occurs.
13.4.1 PWM PERIOD
The PWM period is specified by writing to PRy, the
Timer Period register. The PWM period can be
calculated using Equation 13-1.
EQUATION 13-1: CALCULATING THE PWM
PERIOD⁽¹⁾
PWM Period = [(PRy) + 1] • TCY • (Timer Prescale Value)
where:
PWM Frequency = 1/[PWM Period]
Note 1: Based on TCY = TOSC * 2, Doze mode and
PLL are disabled.
Note:
A PRy value of N will produce a PWM
period of N + 1 time base count cycles. For
example, a value of 7 written into the PRy
register will yield a period consisting of
8 time base cycles.
13.4.2 PWM DUTY CYCLE
The PWM duty cycle is specified by writing to the
OCxRS register. The OCxRS register can be written to
at any time, but the duty cycle value is not latched into
OCxR until a match between PRy and TMRy occurs
(i.e., the period is complete). This provides a double
buffer for the PWM duty cycle and is essential for glitch-
less PWM operation. In the PWM mode, OCxR is a
read-only register.
Some important boundary parameters of the PWM duty
cycle include:
• If the Duty Cycle register, OCxR, is loaded with
0000h, the OCx pin will remain low (0% duty cycle).
• If OCxR is greater than PRy (Timer Period register),
the pin will remain high (100% duty cycle).
• If OCxR is equal to PRy, the OCx pin will be low
for one time base count value and high for all
other count values.
See Example 13-1 for PWM mode timing details.
Table 13-1 shows example PWM frequencies and
resolutions for a device operating at 10 MIPS.
EQUATION 13-2: CALCULATION FOR MAXIMUM PWM RESOLUTION⁽¹⁾
( ) ^log10
FCY
FPWM • (Timer Prescale Value)
Maximum PWM Resolution (bits) =
bits
log₁₀(2)
Note 1: Based on FCY = FOSC/2, Doze mode and PLL are disabled.
© 2009 Microchip Technology Inc.
DS39747E-page 117