PIC24FJ128GA010_09 Datasheet, PDF (160/240 Pages) Microchip Technology – 64/80/100-Pin General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
REGISTER 18-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER⁽¹⁾
bit 7-0
CAL7:CAL0: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every one minute
...
01111111 = Minimum positive adjustment; adds 4 RTC clock pulses every one minute
00000000 = No adjustment
11111111 = Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
...
10000000 =Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
Note 1:
2:
3:
The RCFGCAL Reset value is dependent on type of Reset.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only. It is cleared to ‘0’ on a write to the lower half of the MINSEC register.
REGISTER 18-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
—
—
—
RTSECSEL⁽¹⁾ PMPTTL⁽²⁾
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-2
bit 1
bit 0
Unimplemented: Read as ‘0’
RTSECSEL: RTCC Seconds Clock Output Select bit⁽¹⁾
1 = RTCC Seconds Clock is selected for the RTCC pin
0 = RTCC Alarm Pulse is selected for the RTCC pin
PMPTTL: PMP Module TTL Input Buffer Select bit⁽²⁾
1 = PMP module uses TTL input buffers
0 = PMP module uses Schmitt input buffers
Note 1: To enable the actual RTCC output, the RTCCFG (RTCOE) bit needs to be set.
2: Refer to Table 1-2 for affected PMP inputs.
DS39747E-page 160
© 2009 Microchip Technology Inc.