PIC16F636-I Datasheet, PDF (91/234 Pages) Microchip Technology – 8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC12F635/PIC16F636/639
REGISTER 8-1: LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
U-0
—
bit 7
U-0
R-0
R/W-0
U-0
—
IRVST⁽¹⁾
LVDEN
—
R/W-1
LVDL2
R/W-0
LVDL1
R/W-0
LVDL0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Status Flag bit⁽¹⁾
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt must not be enabled
LVDEN: Low-Voltage Detect Module Enable bit
1 = Enables PLVD Module, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD Module, powers down PLVD circuit and supporting reference circuitry
Unimplemented: Read as ‘0’
LVDL<2:0>: Low-Voltage Detection Level bits (nominal values)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V⁽²⁾
000 = Reserved
Note 1: The IRVST bit is usable only when the HFINTOSC is running.
2: Not tested and below minimum operating conditions.
TABLE 8-1: REGISTERS ASSOCIATED WITH PROGRAMMABLE LOW-VOLTAGE DETECT
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
PIE1
PIR1
LVDCON
Legend:
GIE
PEIE
T0IE
INTE
RAIE
T0IF
INTF
RAIF 0000 000x
OSFIE C2IE
C1IE LCDIE
—
LVDIE
—
CCP2IE 0000 -0-0
OSFIF C2IF
C1IF LCDIF
—
LVDIF
—
CCP2IF 0000 -0-0
—
—
IRVST LVDEN
—
LVDL2 LVDL1 LVDL0 --00 -100
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used by the PLVD module.
0000 000x
0000 -0-0
0000 -0-0
--00 -100
© 2007 Microchip Technology Inc.
DS41232D-page 89