PIC16F636-I Datasheet, PDF (189/234 Pages) Microchip Technology – 8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC12F635/PIC16F636/639
15.11 AC Characteristics: Analog Front-End for PIC16F639 (Industrial)
AC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Supply Voltage
2.0V ≤ VDD ≤ 3.6V
Operating temperature
-40°C ≤ TAMB ≤ +85°C for industrial
LC Signal Input
Sinusoidal 300 mVPP
Carrier Frequency
125 kHz
LCCOM connected to VSS
Param
No.
AF01
Sym.
VSENSE
Characteristic
LC Input Sensitivity
AF02
AF03
AF04
VDE_Q
RFLM
SADJ
Coil de-Q’ing Voltage -
RF Limiter (RFLM) must be active
RF Limiter Turn-on Resistance
(LCX, LCY, LCZ)
Sensitivity Reduction
AF05
AF06
VIN_MOD
Minimum Modulation Depth
75% ± 12%
50% ± 12%
25% ± 12%
12% ± 12%
CTUNX LCX Tuning Capacitor
Min
Typ†
Max
Units
Conditions
1
3.0
3
—
VDD = 3.0V
6
mVPP Output enable filter disabled
AGCSIG = 0; MODMIN = 00
(33% modulation depth setting)
Input = Continuous Wave (CW)
Output = Logic level transition from low-to-
high at sensitivity level for CW input.
5
V VDD = 3.0V, Force IIN = 5 μA
—
300
700
Ohm VDD = 2.0V, VIN = 8 VDC
—
0
—
—
-30
—
63
75
87
38
50
62
13
25
37
0
12
24
—
0
—
VDD = 3.0V
dB No sensitivity reduction selected
dB Max reduction selected
Monotonic increment in attenuation value from
setting = 0000 to 1111 by design
VDD = 3.0V
%
%
%
%
VDD = 3.0V,
pF Config. Reg. 1, bits <6:1> Setting = 000000
AF07 CTUNY LCY Tuning Capacitor
44
63
82
pF 63 pF +/- 30%
Config. Reg. 1, bits <6:1> Setting = 111111
63 steps, 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
VDD = 3.0V,
—
0
—
pF Config. Reg. 2, bits <6:1> Setting = 000000
AF08 CTUNZ LCZ Tuning Capacitor
44
63
82
pF 63 pF +/- 30%
Config. Reg. 2, bits <6:1> Setting = 111111
63 steps, 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
VDD = 3.0V,
—
0
—
pF Config. Reg. 3, bits<6:1> Setting = 000000
44
63
82
pF 63 pF +/- 30%
Config. Reg. 3, bits<6:1> Setting = 111111
63 steps, 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
AF09 FCARRIER Carrier frequency
—
125
—
kHz Characterized at bench.
AF10
FMOD Input modulation frequency
—
—
10
kHz Input data rate, characterized at bench.
AF11
C_Q Q of Trimming Capacitors
50*
—
—
pF Characterized at bench test
AF12
TDR Demodulator Charge Time
—
50
—
(delay time of demodulated output
to rise)
μs VDD = 3.0V
MOD depth setting = 50%
Input conditions:
Amplitude = 300 mVPP
Modulation depth = 80%
AF13
TDF Demodulator Discharge Time
—
50
—
(delay time of demodulated output
to fall)
μs VDD = 3.0V
MOD depth setting = 50%
Input conditions:
Amplitude = 300 mVPP
Modulation depth = 80%
*
†
Note 1:
2:
Parameter is characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Required output enable filter high time must account for input path analog delays (= TOEH - TDR + TDF).
Required output enable filter low time must account for input path analog delays (= TOEL + TDR - TDF).
© 2007 Microchip Technology Inc.
DS41232D-page 187