70353C Datasheet, PDF (66/76 Pages) Microchip Technology – Section 21. Enhanced Controller Area Network

dsPIC33E/PIC24E Family Reference Manual
Figure 21-19: ECAN™ Event Interrupts
TX0
Transmit Buffer Interrupt
TBIF
TX7
RxFUL0
RxFUL31
RxOVF0
RxOVF31
TX Error Warn (TXWAR)
RX Error Warn (RXWAR)
TX Error Passive (TXBP)
RX Error Passive (RXBP)
TX Bus OFF (TXBO)
Receive Buffer Interrupt
RBIF
CiINTF
ECAN™ Event Interrupt
Receive Buffer Overflow Interrupt
RBOVIF
Error Interrupt
FIFO Interrupt
Wake-up
Invalid Message
ERRIF
FIFOIF
WAKIF
IVRIF
21.11.3.1 TRANSMIT BUFFER INTERRUPT
The message buffers 0 to 7 that are configured for message transmission set the Transmit Buffer
Interrupt (TBIF) bit (CiINTF<0>) after the CAN message is transmitted. The ICODE<6:0> bits
(CiVEC<6:0>) indicate the specific message buffer that generated the transmit buffer interrupt.
Transmit buffer interrupt must be cleared in the Interrupt Service Routine (ISR) by clearing the
TBIF bit.
DS70353C-page 21-66
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