70353C Datasheet, PDF (44/76 Pages) Microchip Technology – Section 21. Enhanced Controller Area Network

dsPIC33E/PIC24E Family Reference Manual
21.7.1.1 ACCEPTANCE FILTERS
Figure 21-11 illustrates the incoming message identifier being compared with the filter/mask bits
for standard frames. Figure 21-12 illustrates the incoming message identifier being compared
with the filter/mask bits for extended frames.
Figure 21-11: Acceptance Filtering for a Standard Message
S
IDENTIFIER
O
11 Bits
F
RI
T D RB0
RE
DLC
4 Bits
DATA
8 Bits
CRC
16 Bits
ACK
2 Bits
EOF
7 Bits
IFS
3 Bits
SID10 SID9
11-bit Identifier
SID1 SID0
Accept/Reject Message
SID10 SID9
SID1 SID0
EXIDE
CiRXFnSID
SID10 SID9
SID1 SID0
MIDE
CiRXMnSID
Figure 21-12: Acceptance Filtering for a Extended Message
S
IDENTIFIER
O
11 Bits
F
SI
RD
RE
IDENTIFIER
18 Bits
RRR
TBB
R1 0
DLC
4 Bits
CRC
16 Bits
ACK EOF
2 Bits 7 Bits
IFS
3 Bits
SID10
SID1 SID0 EID17
-
EID1 EID0 29-bit Identifier
Accept/Reject Message
SID10
SID10
SID0
EXIDE
EID17 EID16
CiRXFnSID
EID15 EID14
EID0
CiRXFnEID
SID0
MIDE
EID17 EID16
CiRXMnSID
EID15 EID14
EID0
CiRXMnEID
The acceptance filters 0-15 can be individually enabled or disabled using the Enable Filter bits
(FLTENn) in the ECAN Acceptance Filter Enable register (CiFEN1<15:0>). The value of ‘n’
signifies the register bit and corresponds to the index of the acceptance filter.
The acceptance filters 0-15 specify the identifiers that must be contained in an incoming
message for its contents to be passed to a receive buffer. Each of these filters consists of two
registers – one for the SIDs and the other for EIDs. These registers are identified as:
• CiRXFnSID: ECAN Acceptance Filter Standard Identifier Register n (n = 0-15)
• CiRXFnEID: ECAN Acceptance Filter Extended Identifier Register n (n = 0-15)
DS70353C-page 21-44
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