70353C Datasheet, PDF (54/76 Pages) Microchip Technology – Section 21. Enhanced Controller Area Network

dsPIC33E/PIC24E Family Reference Manual
• Case 6 – shows the FIFO after the eighth message is received and written to message
buffer 5. Now the FIFO is full. There is no interrupt signalled for this condition.
• Case 7 – shows the FIFO after the ninth received message. Now the FIFO has overflowed.
The module sets the RXOVL bit for the buffer intended for writing. The message is lost. The
module generates a receive overflow interrupt.
Figure 21-15: Example of FIFO Operation
FNRB = 5, FBP = 5
Case 1: FIFO at Start
MB5 – RXFUL = 0
MB6 – RXFUL = 0
MB7 – RXFUL = 0
MB8 – RXFUL = 0
MB9 – RXFUL = 0
MB10 – RXFUL = 0
MB11 – RXFUL = 0
FNRB = 5
FBP = 6
FNRB = 5
FBP = 11
FNRB = 6
FBP = 11
Case 2: FIFO 1st Write
MB5 – RXFUL = 1
MB6 – RXFUL = 0
MB7 – RXFUL = 0
MB8 – RXFUL = 0
MB9 – RXFUL = 0
MB10 – RXFUL = 0
MB11 – RXFUL = 0
Case 3: FIFO 6th Write
(About to Fill)
MB5 – RXFUL = 1
MB6 – RXFUL = 1
MB7 – RXFUL = 1
MB8 – RXFUL = 1
MB9 – RXFUL = 1
MB10 – RXFUL = 1
MB11 – RXFUL = 0
Case 4: FIFO 1st Read
MB5 – RXFUL = 0
MB6 – RXFUL = 1
MB7 – RXFUL = 1
MB8 – RXFUL = 1
MB9 – RXFUL = 1
MB10 – RXFUL = 1
MB11 – RXFUL = 0
FBP = 5
FNRB = 6
Case 5: FIFO 7th Write
(About to Fill)
MB5 – RXFUL = 0
MB6 – RXFUL = 1
MB7 – RXFUL = 1
MB8 – RXFUL = 1
MB9 – RXFUL = 1
MB10 – RXFUL = 1
MB11 – RXFUL = 1
Case 6: FIFO 8th Write FIFO Full
FNRB = 6, FBP = 6
MB5 – RXFUL = 1
MB6 – RXFUL = 1
MB7 – RXFUL = 1
MB8 – RXFUL = 1
MB9 – RXFUL = 1
MB10 – RXFUL = 1
MB11 – RXFUL = 1
FNRB = 6
FBP = 7
Case 7: FIFO 9th Write
FIFO Overflow
MB5 – RXFUL = 1
MB6 – RXFUL = 1 RXOVL = 1
MB7 – RXFUL = 1
MB8 – RXFUL = 1
MB9 – RXFUL = 1
MB10 – RXFUL = 1
MB11 – RXFUL = 1
Shaded message buffers indicate the presence of a
received message ready to be read by the user
application.
Note 1: MBn represents message buffers 5-11.
2: ‘Write’ signifies that a message is stored in the FIFO message buffer and the RXFUL flag associated with that
.
buffer is set.
3: ‘Read’ signifies that the user software unloads the FIFO message buffer by reading the contents of that buffer.
Once the buffer location is read, the user software clears the RXFUL bit corresponding to that buffer.
DS70353C-page 21-54
© 2008-2011 Microchip Technology Inc.