PIC16F7X Datasheet, PDF (64/174 Pages) Microchip Technology – 28/40-Pin 8-Bit CMOS FLASH Microcontrollers

PIC16F7X
FIGURE 9-1:
SSP BLOCK DIAGRAM
(SPI MODE)
Read
Internal
Data Bus
Write
SSPBUF reg
RC4/SDI/SDA
SSPSR reg
bit0
RC5/SDO _{Peripheral OE}
Shift
Clock
RA5/SS/AN4
SS Control
Enable
Edge
Select
RC3/SCK/
SCL
2
Clock Select
SSPM3:SSPM0
TMR2 Output
4
2
Edge
Select
TRISC<3>
Prescaler TCY
4, 16, 64
To enable the serial port, SSP enable bit, SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, re-initialize the SSPCON reg-
ister, and then set bit SSPEN. This configures the SDI,
SDO, SCK, and SS pins as serial port pins. For the pins
to behave as the serial port function, they must have
their data direction bits (in the TRISC register) appro-
priately programmed. That is:
• SDI must have TRISC<4> set
• SDO must have TRISC<5> cleared
• SCK (Master mode) must have TRISC<3>
cleared
• SCK (Slave mode) must have TRISC<3> set
• SS must have TRISA<5> set and ADCON must
be configured such that RA5 is a digital I/O
.
Note 1: When the SPI is in Slave mode with SS pin
control enabled (SSPCON<3:0> = 0100),
the SPI module will reset if the SS pin is set
to VDD.
2: If the SPI is used in Slave mode with
CKE = '1', then the SS pin control must be
enabled.
3: When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
‘0100’), the state of the SS pin can affect
the state read back from the TRISC<5>
bit. The Peripheral OE signal from the
SSP module into PORTC controls the
state that is read back from the
TRISC<5> bit (see Section 4.3 for infor-
mation on PORTC). If Read-Modify-Write
instructions, such as BSF are performed
on the TRISC register while the SS pin is
high, this will cause the TRISC<5> bit to
be set, thus disabling the SDO output.
DS30325B-page 62
 2002 Microchip Technology Inc.