PIC16F7X Datasheet, PDF (141/174 Pages) Microchip Technology – 28/40-Pin 8-Bit CMOS FLASH Microcontrollers

PIC16F7X
FIGURE 15-19: A/D CONVERSION TIMING
BSF ADCON0, GO
134
Q4
A/D CLK 132
(TOSC/2)⁽¹⁾
1 TCY
131
130
A/D DATA
7
6
5
4
3
2
1
0
ADRES
OLD_DATA
NEW_DATA
ADIF
GO
SAMPLE
SAMPLING STOPPED
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction
to be executed.
TABLE 15-13: A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
Min Typ† Max Units
Conditions
130 TAD A/D clock period
PIC16F7X
1.6
—
— µs TOSC based, VREF ≥ 3.0V
PIC16LF7X
2.0
—
— µs TOSC based,
2.0V ≤ VREF ≤ 5.5V
PIC16F7X
2.0 4.0 6.0 µs A/D RC mode
PIC16LF7X
3.0 6.0 9.0 µs A/D RC mode
131 TCNV Conversion time (not including
S/H time) (Note 1)
9
—
9 TAD
132 TACQ Acquisition time
5*
—
— µs The minimum time is the
amplifier settling time. This
may be used if the “new” input
voltage has not changed by
more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the
last sampled voltage (as
stated on CHOLD).
134 TGO Q4 to A/D clock start
— TOSC/2 —
— If the A/D clock source is
selected as RC, a time of TCY
is added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Section 11.1 for minimum conditions.
 2002 Microchip Technology Inc.
DS30325B-page 139