PIC16F7X Datasheet, PDF (110/174 Pages) Microchip Technology – 28/40-Pin 8-Bit CMOS FLASH Microcontrollers

PIC16F7X
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
Call Subroutine
[ label ] CALL k
0 ≤ k ≤ 2047
(PC)+ 1→ TOS,
k → PC<10:0>,
(PCLATH<4:3>) → PC<12:11>
None
Call Subroutine. First, return
address (PC+1) is pushed onto
the stack. The eleven-bit immedi-
ate address is loaded into PC bits
<10:0>. The upper bits of the PC
are loaded from PCLATH. CALL is
a two-cycle instruction.
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear f
[ label ] CLRF f
0 ≤ f ≤ 127
00h → (f)
1→Z
Z
The contents of register ’f’ are
cleared and the Z bit is set.
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[ label ] CLRW
None
00h → (W)
1→Z
Z
W register is cleared. Zero bit (Z)
is set.
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear Watchdog Timer
[ label ] CLRWDT
None
00h → WDT
0 → WDT prescaler,
1 → TO
1 → PD
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT. Status bits
TO and PD are set.
COMF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Complement f
[ label ] COMF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (destination)
Z
The contents of register ’f’ are
complemented. If ’d’ is 0, the
result is stored in W. If ’d’ is 1, the
result is stored back in register ’f’.
DECF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Decrement f
[ label ] DECF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) - 1 → (destination)
Z
Decrement register ’f’. If ’d’ is 0,
the result is stored in the W
register. If ’d’ is 1, the result is
stored back in register ’f’.
DS30325B-page 108
 2002 Microchip Technology Inc.