PIC16F7X Datasheet, PDF (170/174 Pages) Microchip Technology – 28/40-Pin 8-Bit CMOS FLASH Microcontrollers

PIC16F7X
USART Synchronous Transmission
(Through TXEN) ........................................ 78
Wake-up from SLEEP via Interrupt .......................... 103
Watchdog Timer ...................................................... 128
Timing Parameter Symbology ......................................... 125
Timing Requirements
Capture/Compare/PWM (CCP1 and CCP2) ............ 130
CLKOUT and I/O ..................................................... 127
External Clock .......................................................... 126
I²C Bus Data ............................................................ 136
I2C Bus START/STOP Bits ..................................... 135
Parallel Slave Port ................................................... 131
RESET, Watchdog Timer, Oscillator
Start-up Timer, Power-up Timer
and Brown-out Reset ............................... 128
SPI Mode ................................................................. 134
Timer0 and Timer1 External Clock .......................... 129
USART Synchronous Receive ................................. 137
USART Synchronous Transmission ........................ 137
TMR1CS bit ....................................................................... 47
TMR1ON bit ....................................................................... 47
TMR2ON bit ....................................................................... 52
TOUTPS<3:0> bits ............................................................ 52
TRISA Register .................................................................. 31
TRISB Register .................................................................. 33
TRISC Register .................................................................. 35
TRISD Register .................................................................. 36
TRISE Register .................................................................. 37
IBF Bit ........................................................................ 38
IBOV Bit ..................................................................... 38
, PSPMODE bit ..................................................... 36 37
TXSTA Register
SYNC bit .................................................................... 69
TRMT bit .................................................................... 69
TX9 bit ....................................................................... 69
TX9D bit ..................................................................... 69
TXEN bit .................................................................... 69
U
UA ...................................................................................... 60
Universal Synchronous Asynchronous
Receiver Transmitter. See USART
Update Address bit, UA ..................................................... 60
USART ............................................................................... 69
Asynchronous Mode .................................................. 73
Asynchronous Receiver ............................................. 75
Asynchronous Reception ........................................... 76
Associated Registers ......................................... 76
Asynchronous Transmission
Associated Registers ......................................... 74
Asynchronous Transmitter ......................................... 73
Baud Rate Generator (BRG) ..................................... 71
Baud Rate Formula ........................................... 71
Baud Rates, Asynchronous Mode
(BRGH = 0) ....................................... 72
Baud Rates, Asynchronous Mode
(BRGH = 1) ....................................... 72
Sampling ........................................................... 71
Mode Select (SYNC Bit) ............................................ 69
Overrun Error (OERR Bit) ......................................... 70
, RC6/TX/CK Pin .....................................................9 11
, RC7/RX/DT Pin .....................................................9 11
Serial Port Enable (SPEN Bit) ................................... 69
Single Receive Enable (SREN Bit) ............................ 70
Synchronous Master Mode ....................................... 77
Synchronous Master Reception ................................ 79
Associated Registers ........................................ 80
Synchronous Master Transmission ........................... 77
Associated Registers ........................................ 78
Synchronous Slave Mode ......................................... 80
Synchronous Slave Reception .................................. 81
Associated Registers ........................................ 81
Synchronous Slave Transmission ............................. 80
Associated Registers ........................................ 81
Transmit Data, 9th Bit (TX9D) ................................... 69
Transmit Enable (TXEN bit) ...................................... 69
Transmit Enable, Nine-bit (TX9 bit) ........................... 69
Transmit Shift Register Status (TRMT bit) ................ 69
W
, Wake-up from SLEEP ...............................................89 102
, Interrupts .............................................................95 96
MCLR Reset .............................................................. 96
WDT Reset ................................................................ 96
Wake-up Using Interrupts ................................................ 102
, Watchdog Timer (WDT) ............................................89 101
Associated Registers ............................................... 101
Enable (WDTE Bit) .................................................. 101
Postscaler. See Postscaler, WDT
Programming Considerations .................................. 101
RC Oscillator ........................................................... 101
Time-out Period ....................................................... 101
WDT Reset, Normal Operation .................... 93, 95, 96
WDT Reset, SLEEP ..................................... 93, 95, 96
WCOL bit ........................................................................... 61
Write Collision Detect bit (WCOL) ..................................... 61
WWW, On-Line Support ...................................................... 4
DS30325B-page 168
 2002 Microchip Technology Inc.