DSPIC33FJ32GS406_12 Datasheet, PDF (397/456 Pages) Microchip Technology – 16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 27-35: SPIx SLAVE MODE (FULL-DUPLEX, CKE = 1, CKP = 1, SMP = 0) TIMING
REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  TA  +125°C for Extended
Param
No.
Symbol
Characteristic⁽¹⁾
Min
Typ⁽²⁾ Max Units
Conditions
SP70 TscP
SP72 TscF
Maximum SCKx Input Frequency
—
SCKx Input Fall Time
—
SP73 TscR
SCKx Input Rise Time
—
SP30 TdoF
SDOx Data Output Fall Time
—
SP31 TdoR
SDOx Data Output Rise Time
—
SP35 TscH2doV, SDOx Data Output Valid after
—
TscL2doV SCKx Edge
SP36 TdoV2scH, SDOx Data Output Setup to
30
TdoV2scL First SCKx Edge
SP40 TdiV2scH, Setup Time of SDIx Data Input
30
TdiV2scL to SCKx Edge
SP41 TscH2diL, Hold Time of SDIx Data Input
30
TscL2diL to SCKx Edge
—
11 MHz See Note 3
—
—
ns See Parameter DO32
and Note 4
—
—
ns See Parameter DO31
and Note 4
—
—
ns See Parameter DO32
and Note 4
—
—
ns See Parameter DO31
and Note 4
6
20
ns
—
—
ns
—
—
ns
—
—
ns
SP50 TssL2scH, SSx  to SCKx  or SCKx Input
120
TssL2scL
—
—
ns
SP51 TssH2doZ SSx  to SDOx Output
High-Impedance
10
—
50
ns See Note 4
SP52 TscH2ssH SSx after SCKx Edge
TscL2ssH
1.5 TCY + 40 —
—
ns See Note 4
SP60 TssL2doV SDOx Data Output Valid after
SSx Edge
—
—
50
ns
Note 1:
2:
3:
4:
These parameters are characterized, but are not tested in manufacturing.
Data in “Typ” column is at 3.3V, +25°C unless otherwise stated.
The minimum clock period for SCKx is 91 ns. Therefore, the SCKx clock, generated by the master, must
not violate this specification.
Assumes 50 pF load on all SPIx pins.
 2009-2012 Microchip Technology Inc.
DS70591E-page 397