DSPIC33FJ32GS406_12 Datasheet, PDF (338/456 Pages) Microchip Technology – 16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 22-12: ADCPC6: ADC CONVERT PAIR CONTROL REGISTER 6⁽²⁾
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
R/W-0
IRQEN12
bit 7
R/W-0
PEND12
R/W-0
SWTRG12
R/W-0
R/W-0
R/W-0
R/W-0
TRGSRC12<4:0>
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7
bit 6
bit 5
Unimplemented: Read as ‘0’
IRQEN12: Interrupt Request Enable 12 bit
1 = Enables IRQ generation when requested conversion of Channels AN25 and AN24 is completed
0 = IRQ is not generated
PEND12: Pending Conversion Status 12 bit
1 = Conversion of Channels AN25 and AN24 is pending; set when selected trigger is asserted
0 = Conversion is complete
SWTRG12: Software Trigger 12 bit
1 = Starts conversion of AN25 (INTREF) and AN24 (EXTREF) if selected by TRGSRC bits⁽¹⁾
This bit is automatically cleared by hardware when the PEND12 bit is set.
0 = Conversion has not started
Note 1: The trigger source must be set as a global software trigger prior to setting this bit to ‘1’. If other
conversions are in progress, the conversion is performed when the conversion resources are available.
2: This register is not available on dsPIC33FJ32GS406 and dsPIC33FJ64GS406 devices.
DS70591E-page 338
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