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| DSPIC33FJ32GS406_12 Datasheet, PDF (188/456 Pages) Microchip Technology – 16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators | |||
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dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
FIGURE 9-1: OSCILLATOR SYSTEM DIAGRAM
Primary Oscillator (POSC)
OSC1
POSCCLK
R(2)
OSC2
S3
S1
POSCMD<1:0>
FRC
Oscillator
PLL(1)
XT, HS, EC
S2
XTPLL, HSPLL,
ECPLL, FRCPLL
FVCO(1)
S1/S3
To ADC and
Auxiliary Clock
Generator
FRCDIVN
S7
DOZE<2:0>
÷2
FCY(4)
FP(4)
FOSC
TUN<5:0>
FRCDIV<2:0>
÷ 16
SOSCO
LPRC
Oscillator
Secondary Oscillator (SOSC)
SOSCI
LPOSCEN
Reference Clock Generation
POSCCLK
FOSC
÷N
REFCLKO(3)
ROSEL RODIV<3:0>
Auxiliary Clock Generation
POSCCLK
FRCCLK
APLL(1)
x16
FRCDIV16
S6
FRC
S0
LPRC
S5
SOSC
S4
Clock Fail Clock Switch
Reset
S7
NOSC<2:0> FNOSC<2:0>
WDT, PWRT,
FSCM
Timer 1
FVCO(1)
ACLK
÷N
To PWM/ADC(1)
ASRCSEL FRCSEL
ENAPLL
SELACLK APSTSCLR<2:0>
Note 1:
2:
3:
4:
See Section 9.1.3 âPLL Configurationâ and Section 9.2 âAuxiliary Clock Generationâ for configuration restrictions.
If the oscillator is used with XT or HS modes, an external parallel resistor with the value of 1 Mï must be connected.
REFCLKO functionality is not available if the primary oscillator is used.
The term, FP, refers to the clock source for all the peripherals, while FCY refers to the clock source for the CPU. Throughout this
document, FP and FCY are used interchangeably, except in the case of Doze mode. FP and FCY will be different when Doze mode
is used in any ratio other than 1:1, which is the default.
DS70591E-page 188
ï£ 2009-2012 Microchip Technology Inc.
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