PIC32MX3XX_1 Datasheet, PDF (179/208 Pages) Microchip Technology – High-Performance, General Purpose and USB 32-bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 29-33: I2Cx BUS DATA TIMING REQUIREMENTS (SLAVE MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
Param.
No.
Symbol
Characteristics
Min.
Max. Units
Conditions
IS10 TLO:SCL Clock Low Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
—
μs
1 MHz mode
(Note 1)
0.5
—
μs
IS11 THI:SCL Clock High Time 100 kHz mode
4.0
—
μs
400 kHz mode
0.6
—
μs
1 MHz mode
(Note 1)
0.5
—
μs
IS20
TF:SCL
SDAx and SCLx 100 kHz mode
Fall Time
400 kHz mode
—
300
20 + 0.1 CB 300
nsec
nsec
1 MHz mode
(Note 1)
—
100 nsec
IS21
TR:SCL
SDAx and SCLx 100 kHz mode
Rise Time
400 kHz mode
—
1000 nsec
20 + 0.1 CB 300 nsec
1 MHz mode
(Note 1)
—
300 nsec
IS25 TSU:DAT Data Input
100 kHz mode
250
— nsec
Setup Time
400 kHz mode
100
— nsec
1 MHz mode
(Note 1)
100
— nsec
IS26 THD:DAT Data Input
100 kHz mode
0
— nsec
Hold Time
400 kHz mode
0
0.9 μs
1 MHz mode
(Note 1)
0
0.3 μs
IS30
TSU:STA Start Condition
Setup Time
100 kHz mode
400 kHz mode
4700
600
—
μs
—
μs
1 MHz mode
(Note 1)
250
—
μs
IS31
THD:STA Start Condition
Hold Time
100 kHz mode
400 kHz mode
4000
600
—
μs
—
μs
1 MHz mode
(Note 1)
250
—
μs
IS33
TSU:STO Stop Condition
Setup Time
100 kHz mode
400 kHz mode
4000
600
—
μs
—
μs
1 MHz mode
(Note 1)
600
—
μs
Note 1: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz.
—
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz.
—
CB is specified to be from
10 to 400 pF.
CB is specified to be from
10 to 400 pF.
—
—
Only relevant for Repeated
Start condition.
After this period, the first
clock pulse is generated.
—
© 2010 Microchip Technology Inc.
DS61143G-page 179