MIC2310_08 Datasheet, PDF (32/34 Pages) Micrel Semiconductor – Single-FET, Constant Power-Limit Hot Swap Controller

Micrel, Inc.
VISS Output Operation
The VISS output provides a voltage which is
proportional to the output current flowing in the
external sense resistor. Figure 18 illustrates the
operation of this output. With the applied V_CC supply
high such that the internal V_REG voltage is above the
controller’s V_VREG(UVLOH) threshold voltage, an elapsed
POR timer, and with the application of an ENABLE
LOW-to-HIGH transition, the GATE drive circuitry is
enabled. When the output load voltage profile is
higher than the controller’s V_PGH threshold voltage and
the V_GS of the external MOSFET is higher than the
controller’s V_GSPGH threshold voltage, the PWRGD
MIC2310
digital output is asserted and the VISS output
becomes active. The current flowing in the external
sense resistor is determined by sensing the voltage
across the sense resistor (V_CCSENSE-V_SENSE). As the
output current varies under changing load conditions,
V_CCSENSE-V_SENSE also varies and the VISS output
voltage changes proportionally according to V_ISS(SENS).
When the external MOSFET is disabled, either by a
HIGH-to-LOW transition on ENABLE or due to a fault
condition, the V_GS of the external MOSFET falls below
the controller’s V_GSPGH threshold voltage. This causes
the PWRGD digital output to be de-asserted and the
VISS output to be disabled.
V_CC & V_REG
VVREG(UVLOH)
VVREG(UVLOL)
ENABLE
GATE
V_OUT
I_LOAD
VISS
tPOR
PWRGD
VGSPGH
VPGH
VGSPGH
VPGL
DISCH
Figure 18. VISS Operation
July 2008
32
M9999-070108-A