MIC2310_08 Datasheet, PDF(17/34 Page) Micrel Semiconductor – Single-FET, Constant Power-Limit Hot Swap Controller

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MIC2310_08 Datasheet, PDF (17/34 Pages) Micrel Semiconductor – Single-FET, Constant Power-Limit Hot Swap Controller

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Micrel, Inc.

Primary OC Trips Circuit Breaker (CB) and CB

Resets with CRETRY (Auto-Retry Timing Capacitor)

Figure 6 illustrates the behavior of the controller to a

primary OC event when a CRETRY capacitor is used to

automatically reset the circuit breaker. The automatic

reset operation is the same for the case of a

secondary OC event. In this example, the primary and

secondary OC detection circuits have been armed

(upon the application of an ENABLE LOW-to-HIGH

transition and after tPOR) and the load capacitor is

charged at a controlled dID/dt rate. Note that in this

diagram, ENABLE is tied to VCC and rises with VCC.

Steady-state operation is achieved as the controllerâs

PWRGD digital output is asserted when the output

load voltage profile is higher than the controllerâs VPGH

threshold voltage and the VGS of the external

MOSFET is higher than the controllerâs VGSPGH

threshold voltage.

When the primary OC detector has been triggered by

an output current exceeding IPOC for a time tPOC, the

circuit breaker is tripped, the GATE drive circuit is

disabled, the fault-mode pull-down current sink is

enabled at the GATE pin, the DISCH output goes

high, and the I_FLT digital output becomes asserted.

MIC2310

The use of an external CRETRY capacitor sets the auto-

retry time, tRETRY, according to the internal VRETRYH

threshold voltage and the CRETRY pin charging

current, IRETRYUP [tRETRY = CRETRY * (VRETRYH/IRETRYUP)].

Prior to the tripping of the OC circuit breaker, a 3mA

current sink is enabled holding the CRETRY pin

voltage at 0V. When the OC circuit breaker has been

tripped, the 3mA current sink is disabled and a 3ÂµA

current source is enabled to charge the external

CRETRY capacitor. When CRETRY has charged above

VRETRYH, the circuit breaker is reset such that the

I_FLT digital output is de-asserted. Additionally, the

3ÂµA current source is disabled and the 3mA current

sink is enabled to discharge the CRETRY pin voltage

back to 0V. When CRETRY has discharged below

VRETRYL, the GATE drive circuit is re-enabled and the

DISCH output returns low. For the case of a persistent

overcurrent load, the controller will continuously cycle

between starting up into an OC condition that trips the

circuit breaker and the auto-retry time before the

circuit breaker is reset.

July 2008

M9999-070108-A

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