MIC2310_08 Datasheet, PDF (15/34 Pages) Micrel Semiconductor – Single-FET, Constant Power-Limit Hot Swap Controller

Micrel, Inc.
Secondary OC Detector Trips Circuit Breaker and
Asserts I_FLT
Figure 4 illustrates the behavior of the controller to an
OC event after the primary and secondary OC
detection circuits have been armed (upon the
application of an ENABLE LOW-to-HIGH transition
and after t_POR) and steady-state operation has been
achieved. Note that the assertion of the controller’s
PWRGD digital output occurs when the output load
voltage profile is higher than the controller’s V_PGH
threshold voltage and the V_GS of the external
MOSFET is higher than the controller’s V_GSPGH
threshold voltage.
The controller’s secondary OC detection threshold is
set by the status of the controller’s S[1:0] pins and its
response time is internally set at t_SOCSENSE as shown in
MIC2310
the ac specification table. When the secondary OC
detector has sensed a very large current surge
(V_CCSENSE – V_SENSE ≥ V_CBS), the circuit breaker is
tripped within t_SOCSENSE. Concurrently, the GATE drive
circuit is disabled and a higher current, fault-mode
pull-down current sink is enabled at the GATE pin.
The DISCH output goes high to (optionally) drive
external pull-down circuitry.
Once the circuit breaker is latched, the I_FLT digital
output is asserted and the PWRGD digital output
becomes de-asserted when the output voltage profile
falls below the controller’s V_PGL threshold voltage or
the V_GS of the external MOSFET falls below the
controller’s V_GSPGH threshold voltage.
VCC = 12V, nominal
VVREG(UVLOH) = +4.25V
VREG = 5V, nominal
July 2008
Figure 4. Secondary OC Detector Trips Circuit Breaker
15
M9999-070108-A