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MIC2310_08 Datasheet, PDF (21/34 Pages) Micrel Semiconductor – Single-FET, Constant Power-Limit Hot Swap Controller
Micrel, Inc.
HW_FLT Asserted by MOSFET DS Short after
Steady-state Operation then ENABLE = HIGH-to-
LOW
Figure 9 illustrates the behavior of the controller to a
shorted DS MOSFET condition after steady-state
operation is achieved via a nominal start-up. Note that
the load capacitor at start-up was charged in a
controlled dID/dt mode and assertion of the controller’s
PWRGD digital output occurs when the output load
voltage profile is higher than the controller’s VPGH
threshold voltage and the VGS of the external
MOSFET is higher than the controller’s VGSPGH
threshold voltage. Upon the application of a HIGH-to-
LOW transition on ENABLE by the service processor,
the GATE drive circuit is disabled, the weak GATE
MIC2310
current sink is enabled, the DISCH output goes high,
and the tDS-SSFAULT timer is started. With the ENABLE
input LOW, a voltage monitor circuit for the controller’s
SOURCE pin (i.e., VOUT) is enabled. If there is a DS
short, the voltage at the source will not drop to 0V
even though the GATE is OFF. If the output voltage at
the SOURCE pin remains higher than the controller’s
VSRCFT(EXT) threshold voltage when the tDS-SSFAULT timer
terminates, the HW_FLT digital output is asserted. To
repair the damaged MOSFET and to reset the
HW_FLT digital output and the controller, the service
processor instructs the main supply to turn off the VCC
supply voltage to the controller such that VREG falls
below the controller’s VVREG(UVLOL) threshold voltage.
Figure 9. Hardware Fault by a MOSFET DS Short after Steady-State Operation
(ENABLE = HIGH-to-LOW)
July 2008
21
M9999-070108-A