71M6543F Datasheet, PDF (83/157 Pages) Maxim Integrated Products – Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation

71M6543F/H and 71M6543G/GH Data Sheet
Wake Enable
Name
Location
Wake Flag
Name
Location
De-bounce Description
Always Enabled
WF_OVF
28B0[4]
No
Wake after WD reset.
Always Enabled
WF_CSTART 28B0[7]
No
Wake after cold start - the first
application of power.
Always Enabled
WF_BADVDD 28B0[2]
No
Wake after insufficient VBAT
voltage.
*This pin is sampled every 2 ms and must remain high for 64 ms to be declared a valid high level. This pin is high-
level sensitive.
Table 65: Wake Bits
Name
Location RST WK Dir Description
EW_DIOR
28B3[2] 0
Connects SEGDIO4 to the WAKE logic and permits
– R/W SEGDIO4 rising to wake the part. This bit has no effect
unless SEGDIO4 is configured as a digital input.
EW_DIO52 28B3[1] 0
Connects DIO52 to the WAKE logic and permits DIO52
– R/W high level to wake the part. This bit has no effect unless
DIO52 is configured as a digital input.
EW_DIO55 28B3[0] 0
Connects DIO55 to the WAKE logic and permits DIO55
– R/W high level to wake the part. This bit has no effect unless
DIO55 is configured as a digital input.
WAKE_ARM 28B2[5] 0
Arms the WAKE timer and loads it with the value in
–
R/W
WAKE_TMR (I/O RAM 0x2880) register. When SLP or
LCD mode is asserted by the MPU, the WAKE timer
becomes active.
EW_PB
28B3[3] 0
Connects the PB pin to the WAKE logic and permits PB
– R/W high level to wake the part. PB is always configured as
an input.
EW_RX
28B3[4] 0
Connects the RX pin to the WAKE logic and permits
– R/W RX rising to wake the part. See 3.4.1 for de-bounce
issues.
SEGDIO4 flag bit. If SEGDIO4 is configured to wake
WF_DIO4 28B1[2] 0 – R the part, this bit is set whenever SEGDIO4 rises. It is
held in reset if SEGDIO4 is not configured for wakeup.
SEGDIO52 flag bit. If SEGDIO52 is configured to wake
WF_DIO52 28B1[1] 0
–
R
the part, this bit is set whenever SEGDIO52 is a high
level. It is held in reset if SEGDIO52 is not configured
for wakeup.
SEGDIO55 flag bit. If SEGDIO55 is configured to wake
WF_DIO55 28B1[0] 0
–
R
the part, this bit is set whenever SEGDIO55 is a high
level. It is held in reset if SEGDIO55 is not configured
for wakeup.
WF_TMR 28B1[5] 0 – R Indicates that the Wake timer caused the part to wake up.
WF_PB
28B1[3] 0 – R Indicates that the PB pin caused the part to wake.
WF_RX
28B1[4] 0 – R Indicates that RX pin caused the part to wake.
WF_RST
28B0[6] *
WF_RSTBIT 28B0[5] *
WF_ERST 28B0[3] *
WF_CSTART 28B0[7] *
WF_BADVDD 28B0[2] *
Indicates that the RST pin, E_RST pin, RESET bit (I/O
–
R
RAM 0x2200[3]), the cold start detector, or low voltage
on the VBAT pin caused the part to reset.
*See Table 66 for details.
v1.2
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