English
Language : 

71M6543F Datasheet, PDF (130/157 Pages) Maxim Integrated Products – Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation
71M6543F/H and 71M6543G/GH Data Sheet
5.4.10 CE Calibration Parameters
Table 87 lists the parameters that are typically entered to effect calibration of meter accuracy.
CE
Address
0x10
0x11
0x13
0x14
0x16
0x17
0x19
0x12
0x15
0x18
0x12
Name
CAL_IA
CAL_VA
CAL_IB
CAL_VB
CAL_IC
CAL_VC
CAL_ID
PHADJ_A
PHADJ_B
PHADJ_C
DLYADJ_A
Table 87: CE Calibration Parameters
Defau
lt
Description
16384
16384
16384
16384
16384
16384
16384
0
0
These constants control the gain of their respective channels. The
nominal value for each parameter is 214 = 16384. The gain of each
channel is directly proportional to its CAL parameter. Thus, if the
gain of a channel is 1% low, CAL should be increased by 1%.
These constants control the CT phase compensation. No
compensation occurs when PHADJ_X = 0. As PHADJ_X is increased,
more compensation (lag) is introduced. The range is ± 215 – 1. If it
is desired to delay the current by the angle Φ, the equations are:
PHADJ _ X = 220
0.029615TANΦ
at 60Hz
0.1714 − 0.0168 ⋅ TANΦ
0
PHADJ _ X = 220
0.0206 ⋅ TANΦ
at 50Hz
0.1430 − 0.01226 ⋅ TANΦ
The shunt delay compensation is obtained using the equation
provided below:
0
( ) DLYADJ
_
X
=
∆deg rees
1 + 0.1∆degrees
214
2π
360
a2
cos2

2πf
fs

+
2ab
cos
2πf
fs
c
sin
2πf
fs

 + b
where:
0x15 DLYADJ_B 0
a = 2A
b = A2 +1
𝑐
=
2𝐴2
+
4𝐴𝑐𝑜𝑠
2𝜋𝑓
� 𝑓𝑠 �
+
2
f is the mains frequency
fs is the sampling frequency
The table below provides the value of A for each channel:
0x18 DLYADJ_C 0
Channel
Value of A
(decimal)
D YADJ_A
13840
DLYADJ_B
11693
DLYADJ_C
9359
Note:
The current sensor inputs are not assigned to the A, B and C phases in a fixed manner. The
assignments of phases A, B and C depends on how the IADC0-1, IADC2-3, IADC4-5, IADC6-7 current
sensing inputs are connected in the meter design. The CE code must be aware of these connections.
See Figure 31 and Figure 32 for typical meter configurations. VADC8, VADC9 and VADC10 are
assigned to voltage phases VA, VB and VC in a fixed manner, respectively.
The CE addresses listed in this table are assigned to phases A, B and C as indicated by their names.
130
© 2008–2011 Teridian Semiconductor Corporation
v1.2