71M6543F Datasheet, PDF (68/157 Pages) Maxim Integrated Products – Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation

71M6543F/H and 71M6543G/GH Data Sheet
EECTRL Byte Written
Write -- With HiZ
SCLK (output)
CNT Cycles (6 shown)
INT5
SDATA (output)
D7
D6
D5
D4
D3
D2
SDATA output Z
(LoZ)
(HiZ)
BUSY (bit)
Figure 19: 3-wire Interface. Write Command, HiZ=1
EECTRL Byte Written
READ
SCLK (output)
CNT Cycles (8 shown)
INT5
SDATA (input)
D7
D6
D5
D4
D3
D2
D1
D0
SDATA output Z
(HiZ)
BUSY (bit)
Figure 20: 3-wire Interface. Read Command.
EECTRL Byte Written
Write -- No HiZ
SCLK (output)
INT5 not issued
EECTRL Byte Written
CNT Cycles (0 shown)
Write -- HiZ
SCLK (output)
INT5 not issued
CNT Cycles (0 shown)
SDATA (output)
D7
SDATA (output)
SDATA output Z
(LoZ)
SDATA output Z
(HiZ)
BUSY (bit)
BUSY (bit)
Figure 21: 3-Wire Interface. Write Command when CNT=0
EECTRL Byte Written
Write -- With HiZ and WFR
SCLK (output)
CNT Cycles (6 shown)
SDATA (out/in)
SDATA output Z
D7
D6
D5
D4
D3
D2
(From 6520)
(LoZ)
BUSY
(From EEPROM)
(HiZ)
BUSY (bit)
Figure 22: 3-wire Interface. Write Command when HiZ=1 and WFR=1.
INT5
READY
2.5.12 SPI Slave Port
The slave SPI port communicates directly with the MPU data bus and is able to read and write Data RAM
and Configuration RAM (I/O RAM) locations. It is also able to send commands to the MPU. The interface
to the slave port consists of the SPI_CSZ, SPI_CKI, SPI_DI and SPI_DO pins. These pins are multiplexed
with the combined DIO/LCD segment driver pins SEGDIO36 to SEGDIO39 (pins 3, 2, 1 and 100).
Additionally, the SPI interface allows flash memory to be read and to be programmed. To facilitate flash
programming, cycling power or asserting RESET causes the SPI port pins to default to SPI mode. The
SPI port is disabled by clearing the SPI_E bit (I/O RAM 0x270C[4]).
Possible applications for the SPI interface are:
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