81080V Datasheet, PDF (7/26 Pages) Lattice Semiconductor – 3.3V In-System Programmable SuperBIG™ High Density PLD

Figure 4. ispLSI 8000V I/O Cell
TOE
GLOBAL OE0
GLOBAL OE1
GLOBAL OE2
GLOBAL OE3
From Output
Control Bus
Multiplexed Output From
Big Fast Megablock or
Global Track
GLOBAL I/O CLOCK ENABLE
From Output
Control Bus
GLOBAL CLOCK0
GLOBAL CLOCK2
QUADRANT I/O CLOCK
From Output
Control Bus
GRST
From Output
Control Bus
Specifications ispLSI 81080V
VCCIO VCCIO
VCCIO
D
Q
CLKEN
R/L
PR
Slew Open
Rate Drain
Big Fast Megablock I/O Pad
or Global I/O Pad
To Specific
Big Fast Megablock
or Global Tracks
To Specific
Global Tristate Bus
From Output
Control Bus
Global I/O Cell
Only
: Function Selector (E² Cell Controlled)
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