PALLV22V10 Datasheet, PDF (15/19 Pages) Lattice Semiconductor – Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device

ENDURANCE CHARACTERISTICS
The PALLV22V10 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process.
This technology uses an EE cell to replace the fuse link used in bipolar parts. As a result, the device
can be erased and reprogrammed—a feature which allows 100% testing at the factory.
Symbol
Parameter
t_DR
Min Pattern Data Retention Time
N
Min Reprogramming Cycles
Test Conditions
Max Storage Temperature
Max Operating Temperature
Normal Programming Conditions
Value
10
20
100
Unit
Years
Years
Cycles
ROBUSTNESS FEATURES
R The PALLV22V10 has some unique features that make it extremely robust, especially when
operating in high speed design environments. Input clamping circuitry limits negative overshoot,
FO ^{eliminating the possibility of false clocking caused by subsequent ringing. A special noise filter}
makes the programming circuitry completely insensitive to any positive overshoot that has a pulse
S ^{width of less than about 100 ns.}
E _{INPUT/OUTPUT EQUIVALENT SCHEMATICS}
IC ^{S VCC}
EV ^{IGN VCC}
D _{ES > 50 KΩ}
SE ^{GANLEW D ESD}
Protection
U ^and
Clamping
Programming
Pins only
Programming
Voltage
Detection
Positive
Overshoot
Filter
Programming
Circuitry
Typical Input
V_CC
5-V
Protection
Provides ESD
Protection and
Clamping
Preload Feedback
Circuitry Input
Typical Output
18956D-017
PALLV22V10 and PALLV22V10Z Families
15