PALLV22V10 Datasheet, PDF (1/19 Pages) Lattice Semiconductor – Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device

PALLV22V10 COM'L: -7/10/15
PALLV22V10Z
IND: -15
IND: -25
PALLV22V10 and PALLV22V10Z Families
Low-Voltage (Zero Power) 24-Pin EE CMOS
Versatile PAL Device
DISTINCTIVE CHARACTERISTICS
x Low-voltage operation, 3.3 V JEDEC compatible
— V_CC = + 3.0 V to 3.6 V
x Commercial and industrial operating temperature range
x 7.5-ns t_PD
x Electrically-erasable technology provides reconfigurable logic and full testability
R x 10 macrocells programmable as registered or combinatorial, and active high or active low to
match application needs
O _{x Varied product term distribution allows up to 16 product terms per output for complex}
F _functions
x Global asynchronous reset and synchronous preset for initialization
S _{x Power-up reset for initialization and register preload for testability}
E _{x Extensive third-party software and programmer support}
IC ^{S x 24-pin SKINNY DIP and 28-pin PLCC packages save space}
EV ^{IGN GENERAL DESCRIPTION}
D ^{S The PALLV22V10 is an advanced PAL® device built with low-voltage, high-speed, electrically-}
E _{erasable CMOS technology.}
L _{D The PALLV22V10Z provides low voltage and zero standby power. At 30 µA maximum standby}
A _{current, the PALLV22V10Z allows battery powered operation for an extended period.}
G ^W _{The PALLV22V10 device implements the familiar Boolean logic transfer function, the sum of}
E _{products. The PAL device is a programmable AND array driving a fixed OR array. The AND array}
SE ^{N is programmed to create custom product terms, while the OR array sums selected terms at the}
U ^outputs.
The product terms are connected to the fixed OR array with a varied distribution from 8 to 16
across the outputs (see Block Diagram). The OR sum of the products feeds the output macrocell.
Each macrocell can be programmed as registered or combinatorial, and active high or active low.
The output configuration is determined by two bits controlling two multiplexers in each macrocell.
Publication# 18956 Rev: F
Amendment/0
Issue Date: September 2000