ISL6534 Datasheet, PDF (7/26 Pages) Intersil Corporation – Dual PWM with Linear

ISL6534
Electrical Specifications Operating Conditions: V_CC = 5V, V_CC12 = 12V, T_A = 0°C to 70°C, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
Adjustment Range
FS_SYNC pin: resistor to GND; see Figure 12 for curves
300
1000 kHz
Sawtooth Amplitude
2.1
V
Duty-Cycle Range
0
87.5
%
ERROR AMPLIFIER (OUT1 and OUT2)
Open-Loop Gain
RL = 10kΩ to ground; (Note 5)
85
dB
Open-Loop Bandwidth
CL = 100pF, RL = 10kΩ to ground; (Note 5)
15
MHz
Slew Rate
CL = 100pF, RL = 10kΩ to ground; (Note 5)
4
V/µs
EA Offset
COMP1/2 to FB1/2; compare to internal VREF/REFIN
2
mV
Maximum Output Voltage
RL = 10kΩ to ground; (may trip short-circuit)
3.6 4.1
V
Output High Source Current
COMP1/2
-8
mA
Output Low Sink Current
COMP1/2
6
mA
PROTECTION AND MONITOR
Under-Voltage Threshold (COMP1 and Causes PGOOD to go low; if there for a filter time,
COMP2)
Implies the COMP pin(s) is out -of-range, and shuts down IC
3.3
V
UV filter time
based on internal oscillator clock frequency
(nominal 300kHz = 3.3µs clock period)
1
2
clock
pulses
PGOOD Low Voltage
IPGOOD = 2mA
0.1 0.3
V
LINEAR REGULATOR (OUT3)
Output Voltage
(As determined by resistor divider into FB3)
0.6
3.3
V
EA Offset
DRIVE3 to FB3; compare to internal VREF
2
mV
DRIVE3 High Output Voltage
9
V
DRIVE3 High Output Source Current
0.4
mA
DRIVE3 Low Output Sink Current
0.4
mA
VREF
Output Voltage
1.1µF max capacitance
3.3
V
Output Accuracy
-0.8
+0.8
%
Source Current
2.0
mA
REFOUT (VTTREF)
Output Voltage
Determined by REFIN voltage
0.6
3.3
V
Offset Voltage
-10
+10
mV
Source Current
0.2
20
mA
Sink Current
0.48
mA
Output Capacitance
0.4
2.2
µF
Output High Voltage Minimum
To select 0 degree phase; see Table 1
4.7 VCC
V
ENABLE/SOFTSTART (SS/EN 1, 2, 3)
Enable Threshold
EN Rising
1.05
V
EN falling
0.95
Noise Immunity (noise de-glitch)
6
µs
Soft-Start Current
-30
µA
7
FN9134.1