ISL6534 Datasheet, PDF (19/26 Pages) Intersil Corporation – Dual PWM with Linear

ISL6534
These equations assume linear voltage-current transitions
and do not adequately model power loss due the reverse-
recovery of the lower MOSFETs body diode. The
gate-charge losses are dissipated by the ISL6534 and don't
heat the MOSFETs. However, large gate-charge increases
the switching interval, t_SW which increases the upper
MOSFET switching losses. Ensure that both MOSFETs are
within their maximum junction temperature at high ambient
temperature by calculating the temperature rise according to
package thermal-resistance specifications. A separate
heatsink may be necessary depending upon MOSFET
power, package type, ambient temperature and air flow.
Standard-gate MOSFETs (typically 30V breakdown and 20V
maximum gate voltage) are normally recommended for use
with the ISL6534, especially since 12V is expected to be
available to drive the gates. However, logic-level gate
MOSFETs can be used under special circumstances. The
input voltage, upper gate drive level, and the MOSFETs
absolute gate-to-source voltage rating determine whether
logic-level MOSFETs are appropriate.
Figure 17 shows the upper gate drive (BOOT pin) supplied
by a bootstrap circuit from VCC12. The boot capacitor,
C_BOOT develops a floating supply voltage referenced to the
PHASE node. This supply is refreshed each cycle to a
voltage of VCC12 less the boot diode drop (V_D) when the
lower MOSFET, Q2 turns on. A logic-level MOSFET can only
be used for Q1 if the MOSFETs absolute gate-to-source
voltage rating exceeds the maximum voltage applied to VIN
= VCC12. Note that a lower voltage supply (such as 5V) can
also be used for bootstrapping, which would allow for a lower
gate voltage rating; but only if the lower voltage is still high
enough to turn the upper FET on hard enough. For Q2, a
logic-level MOSFET can be used if its absolute gate-to-
source voltage rating exceeds the maximum voltage applied
to VCC12.
+12V
VCC12
D_BOOT
+-
V_D
+5V OR +12V
ISL6534
BOOT
UGATE
C_BOOT
Q1
(CHANNEL ^PGND
1 OR 2)
VCC12
PHASE
-
LGATE
Q2
+
PGND
NOTE:
V_G-S ≈ V_CC12 - V_D
D2 (OPTIONAL)
NOTE:
V_G-S ≈ VCC12
GND
FIGURE 17. UPPER GATE DRIVE - BOOTSTRAP OPTION
Figure 18 shows the upper gate drive supplied by a direct
connection to VCC12. This option should only be used in
converter systems where the main input voltage is +5 VDC
or less. The peak upper gate-to-source voltage is
approximately VCC12 less the input supply. For +5V main
power and +12 VDC for the VIN bias, the gate-to-source
voltage of Q1 is 7V. A logic-level MOSFET may be a good
choice for Q1 (again, check the max gate voltage ratings)
and a logic-level MOSFET can be used for Q2 if its absolute
gate-to-source voltage rating exceeds the maximum voltage
applied to VCC12.
+12V
VCC12
+5V OR LESS
ISL6534
BOOT
Q1
UGATE
(CHANNEL _PGND
1 OR 2)
VCC12
PHASE
Q2
-
LGATE
+
PGND
NOTE:
V_G-S ≈ V_CC12 - 5V
D2 (OPTIONAL)
NOTE:
V_G-S ≈ VCC12
GND
FIGURE 18. UPPER GATE DRIVE - DIRECT VCC12 DRIVE
OPTION
Bootstrap Trade-offs
Note again that bootstrapping to 12V requires that the upper
FET have a maximum gate-source rating of greater than
12V. Since the LGATE output is sourced from the VCC12
supply in all cases, the lower FET must also have the high
rating. So this may rule out using some 20V breakdown
FETs that have gate ratings of 12V or less.
Figure 17 shows the diode D_BOOT and bootstrap capacitor
C_BOOT. A small capacitor (~1µF; not shown) is sometimes
used as a local decoupling cap; it should be placed near the
anode of the diode to GND.
The anode of the diode is shown tied to VCC12, but it can
also connect to VCC (even in the shunt regulator mode) or to
VIN or to another appropriate supply.
Figure 18 shows the direct hookup; the advantage is that two
components (D_BOOT and C_BOOT) are not needed; a
possible disadvantage is that the VCC12 may not be the
optimum voltage for efficiency (perhaps a bootstrap
diode/capacitor to 5V would be better, for example). Once
again, a small capacitor (not shown) located near the
BOOT1 pin is sometimes used for decoupling.
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FN9134.1