ISL6534 Datasheet, PDF (22/26 Pages) Intersil Corporation – Dual PWM with Linear

ISL6534
Only 3 of the 4 possible states are shown decoded. There
are other variations of this technique, but this shows the
basic principle. Since the FB are sensitive nodes, care
should be taken in the layout, to keep the extra resistors near
the pin.
A variation of this technique can be used without the margining
to fine tune the output voltage, when two 1% resistors (R1, R2)
can’t give the exact value desired, and an active factory trim is
not feasible. Simply use a much higher value resistor in parallel
with either R1 or R2 (or both) to fine-tune the value; a 100-1
ratio in resistor values will be able to change the voltage by
roughly 1%; that might be good enough.
COMP1
VOUT1
R1
RM1, RM2 >> R1, R2
A OFF, B OFF 10% HIGH
A OFF, B ON NOMINAL
A ON, B ON
10% LOW
RM2
A
FB1
R2
RM1
B
FIGURE 20. MARGINING COMPONENT SELECTION
Short-Circuit Protection
The ISL6534 does not have the typical over-current
protection used by many of the Core Processor IC’s. Instead,
it has a simple and inexpensive method of protection. But it
is important for the user to understand the method used, and
the limitations of that method.
There are no sense pins available on the ISL6534. This
means that the many standard ways of sensing output
current (sense resistors, FET r_DS(ON), Inductor DCR, etc.)
are not possible, without adding a lot of external
components. There are also no Phase pins available.
Monitoring Under-Voltage (by sensing drops on the FB pins,
or on the outputs) was not done.
The only method of protection for the two switching
regulators is to monitor the COMP1 and COMP2 pins for
over-voltage (and note that the linear output has no
protection at all). What happens on a short-to-GND on the
output? As the output voltage is dragged down, the FB pin
should start to follow, since it is usually just a resistor divider
from the output. The loop detects that the FB pin is lower
than the Error-Amp reference, and the COMP voltage will
rise to try to equalize them; that will increase the duty-cycle
of the upper FET gate driver (which allows more time to pull
the output voltage higher). If the short is hard enough, the
COMP pin will rise higher and the duty cycle will increase
further. If the short is still too hard, at some point the COMP
pin output will go out of range, the duty cycle will hit the
maximum, and the loop can no longer effectively try any
harder. This is the point at which an Over-Current condition
is detected. A comparator monitors the COMP pins, and if
either one exceeds the trip point (nominal 3.3V), and stays
above it for a filter time (1-2 clock pulses of the internal
oscillator; 3-6µs at the nominal 300kHz; 2-4µs at 500kHz),
then it will shut down both switchers, as well as the linear
regulator, and require a POR on either (or both) of the
VCC12 or VCC power pins. There is no “hiccup” mode,
where it keeps trying.
So that is the detection method; what are the implications of
it? On the plus side, it’s built in, and the user doesn’t have to
set anything to use it; no additional components are
required. On the negative side, it is not easy to predict its
performance, since many factors can affect how well it
works. It was designed to detect a “hard” short; like a
screwdriver shorting the output to GND. But defining how
close to “zero ohms” the short has to be in order to work
properly is not straightforward. If the resistance is too high to
trip the detector, the regulator will react simply as if the load
has increased, and will continue to try to regulate up until the
FETs overheat. If the COMP pin doesn’t immediately rise to
its trip point when the short is applied, chances are it won’t
trip later as the FETs heat up. So most of the potential
problems can occur if the initial trip is missed.
Following are a list of the many possible factors that affect
the performance:
1. If the power supply used for the VIN of one of the
regulators is shared with the VCC12 (or VCC) supply of
the IC, then shorting the output could potentially
momentarily drag down the supply low enough to trip the
VCC12 (or VCC) falling POR, which could result in
unpredictable behavior once the outputs shut off due to
the POR, and then try to start up into the short after the
supply recovers. This scenario can be avoided with a
“stiff” power supply, or a separate one.
2. If the power supply for VIN has a built-in current shutdown
or limit, then it might shut-down before the IC, or the
limiting might help the IC shutdown, either of which is
generally good. However, many supplies used in real
systems don’t have this built in, or would require a much
higher current short than this scenario would provide.
3. If the circuit survives the initial short but doesn’t shut
down, the removal of the short can cause an inductive
kick on the phase node, which can create an over-voltage
condition on the boot pin, which can in the worst case
damage the IC and/or the FETs.
4. The resistance of the short itself is probably the most
critical factor affecting the over-current shutdown
performance. If the short is not low enough resistance,
then the part will NOT shutdown, and the FETs can
overheat. Note that the “short” to the output also includes
wiring, PCB traces, contact resistances, as well as all of
the return paths.
5. The higher the output voltage, the more current you will
get out of a fixed-resistance short, and the more likely you
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FN9134.1