ISL78268 Datasheet, PDF (6/33 Pages) Intersil Corporation – Integrated 2A sourcing

Block Diagram
VIN
PVCC
VCC
EN
SS
5.2V
LDO
VIN/30
1/30
+
-
VREF_VINOV
POR
PLL
OVER
TEMP
1.2V
3.4V
5µA
INITIALIZATION
DELAY
EN_SS
SOFT-START
LOGIC
Vin_OV
1.15VREF ₊
FB
-
-
0.87VREF ₊
EN_SW
HICCUP/
LATCHOFF
OC_AVG
Vo_OV
Vo_UV
SS_DONE
VREF = 1.6V
+
+ Gm
FB
-
COMP
VCC - 0.7V
1.6V
+ _Gm
-
IMON/DE
SGND
SGND
OC_AVG
2V
+
-
OC1
FAULT
SGND
CLOCK _S
R1
R2
OC2
OC1
Q
I_SEN1
I_{SEN1_OC2}
+
-
93µA _{ISEN1_OC1}
+
-
70µA
PWM CONTROL
(ISEN2+68µA)/8
ZERO
CROSS
DETECTION
I_{SEN2_ZCD}
NEGATIVE
OC
I_SEN2
I_{SEN2_Neg}
-50µA
PGOOD
CLOCK
VCO
I_SLOPE
SLOPE
COMPENSATION
CSA1
112µA
A_V = 1
112µA
PVCC
PGND
CSA2
112µA
A_V = 1
112µA
N.C.
EPAD
HIC/LATCH
FSYNC
PLL_COMP
CLKOUT
SLOPE
ISEN1P
ISEN1N
BOOT
UG
PH
LG
PGND
ISEN2P
ISEN2N