ISL78268 Datasheet, PDF (12/33 Pages) Intersil Corporation – Integrated 2A sourcing

ISL78268
Electrical Specifications Refer to the Block Diagram (page 6) and Typical Application Schematics (page 7). Operating conditions unless
otherwise noted: V_IN = 12V, V_PVCC = 5.2V and V_VCC = 5.2V, EN = 5.0V, T_A = -40°C to +125°C. Typicals are at T_A = +25°C.
Boldface limits apply across the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 7) TYP (Note 7) UNITS
Slew Rate
COMP Output Current Capability
C_CMP = 100pF from COMP pin to GND
±2.5
±300
V/µs
µA
COMP Output Voltage High
3.5
3.7
3.9
V
COMP Output Voltage Low
0.3
V
SLOPE COMPENSATION SETTING
SLOPE Pin Voltage
500
mV
SLOPE Accuracy
CURRENT SENSE AMPLIFIER
R_SLOPE = 20k (0.1%)
R_SLOPE = 40.2k (0.1%)
-30
30
%
-30
30
%
ISENxN, ISENxP Common Mode Voltage Range
4
55
V
ISENxN, ISENxP Bias Current
ZERO CROSSING DETECTION
I_SENxBIAS
Sinking into pin, EN = 5V,
V_ISENxN = V_ISENxP = 4V to 55V
90
112 130 µA
Zero Crossing Detection (ZCD) Threshold
OVERCURRENT PROTECTION
V_{ZCD_TH}
R_SEN Differential Voltage
R_SET2A+R_SET2B = 665Ω (0.1%)
R_BIAS2A+R_BIAS2B = 665Ω (0.1%)
See page 7 for R_SET resistors
1.3
mV
Peak Current Cycle-by-Cycle Limit Voltage
Threshold
Peak Current Cycle-by-Cycle Limit Delay
Peak Current Hiccup/Latch-off Voltage
Threshold
OC2 Hiccup/Latch-off Blanking Time
V_OC1
V_OC2
R_SEN Differential Voltage
R_SET1A+R_SET1B = 665Ω (0.1%)
R_BIAS2A+R_BIAS2B = 665Ω (0.1%)
See page 7 for R_SET resistors
UG = OPEN, from V_OC1 threshold to UG falling
R_SEN Differential Voltage
R_SET1A +R_SET1B = 665Ω (0.1%)
R_BIAS2A+R_BIAS2B = 665Ω (0.1%)
See page 7 for R_SET resistors
Consecutive OC2 switching cycles
32
47
60 mV
50
ns
45
62
75 mV
3
cycles
OC2 Hiccup Retry Delay
500
ms
AVERAGE OVERCURRENT PROTECTION AND CONSTANT CURRENT LIMITING LOOP
IMON Offset Current
IMON Current Accuracy
Fault Threshold at IMON/DE Pin
IMON_CSA2
IMON_CSA2
V_RSEN-CSA2 = 0mV, V_ISEN2N = 4V to 55V,
R_SET2A+R_SET2B = 665Ω (0.1%)
R_BIAS2A+R_BIAS2B = 665Ω (0.1%)
V_RSEN-CSA2 = 25mV, V_ISEN2N = 4V to 55V,
R_SET2A+R_SET2B = 665Ω (0.1%)
R_BIAS2A+R_BIAS2B = 665Ω (0.1%)
V_RSEN-CSA2 = 76mV, V_ISEN2N = 4V to 55V,
R_SET2A+R_SET2B = 665Ω (0.1%)
R_BIAS2A+R_BIAS2B = 665Ω (0.1%)
Selected LATCHOFF/HICCUP response
7.0
8.5 10.0 µA
12
13.2
15
µA
21
22.8
26
µA
1.9
2.0
2.1
V
OC_AVG Hiccup Retry Delay
500
ms
Constant Current Limit Reference Accuracy
PWM CONTROLLER
VREF_CC
1.584 1.6 1.616 V
Minimum UGATE ON Time
Minimum UGATE OFF Time
Minimum LGATE ON Time
t_{MINON_UG}
t_{MINOFF_UG}
t_{MINON_LG}
UGATE pulse width, UG = OPEN, LG = OPEN
V_COMP = 3.5V, UG = OPEN, LG = OPEN
V_COMP = 3.5V, UG = OPEN, LG = OPEN
240 300 360 ns
285
ns
140 175 210 ns
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FN8657.3
December 12, 2014