ISL78268 Datasheet, PDF (29/33 Pages) Intersil Corporation – Integrated 2A sourcing

ISL78268
Ceramic capacitors must be used at the VIN pin of the IC and
multiple ceramic capacitors including 1µF and 0.1µF are
recommended.
Place these capacitors as close as possible to the IC.
Power MOSFET
The external MOSFETs that are driven by the ISL78268 controller
need to be carefully selected to optimize the design of the
synchronous buck regulator.
Since the ISL78268 input voltage can be up to 55V, the
MOSFET's BVdss rating needs to have enough voltage margin
against input voltage tolerance and PH node voltage transient
during switching.
As the UG and LG gate drivers are 5V output, the MOSFET VGS
need to be in this range.
The MOSFET should have low Total Gate Charge (Q_gd), low
ON-resistance (r_DS(ON)) at VGS = 4.5V (less than 10mΩ is
recommended) and small gate resistance (R_g <1.5Ω is
recommended). It is recommended that the minimum VGS
threshold should be higher than 1.2V but not exceeding 2.5V.
This is because of the consideration of large gate pull-down
current associated by gate-drain current at low side transistor
due to the high speed transition of Phase node and limitation of
maximum gate drive voltage, which is 5.2V (typ) for low-side
MOSFET and lower than 4.5V (typ) due to diode drop of boot
diode for high-side MOSFET.
Bootstrap Capacitor
The power required for high-side MOSFET drive is provided by the
boot capacitor connected between BOOT and PH pins. The
bootstrap capacitor can be chosen using Equation 26:
C_B
O
O
T

---^Q----^g----^a---^t--^e----
dV_BOOT
(EQ. 26)
Where Q_gate is the total gate charge of the high-side MOSFET
and dV_BOOT is the maximum droop voltage across the bootstrap
capacitor while turning on the high-side MOSFET.
Though the maximum charging voltage across the bootstrap
capacitor is PVCC minus the bootstrap diode drop (~4.5V), large
excursions below GND by PH node requires at least 10V rating for
this ceramic capacitor. To keep enough capacitance over the
biased voltage and temperature range, a good quality capacitor
such as X7R or X5R is recommended.
RESISTOR ON BOOTSTRAP CIRCUIT
In the actual application, sometimes a large ringing noise at the
PH node and the boot node are observed. This noise is caused by
energy stored in the body diode of the low-side MOSFET when it
is turning off, parasitic PH node capacitance due to PCB routing,
and the parasitic inductance. To reduce this noise, a resistor can
be added between the BOOT pin and the bootstrap capacitor. A
large resistor value will reduce the ringing noise at PH node but
limits the charging of the bootstrap capacitor during the low-side
MOSFET on-time, especially when the controller is operating at
very high duty cycle.
Typically, up to 10Ω resistor is used for this purpose.
Loop Compensation Design
The ISL78268 uses constant frequency peak current mode
control architecture with a Gm amp as the error amplifier. An
external current sense resistor is required for the peak current
sensing and overcurrent protection. Figures 49 and 50 show the
conceptual schematics and control block diagram, respectively.
FIGURE 49. CONCEPTUAL BLOCK DIAGRAM OF PEAK CURRENT
MODE CONTROLLED BUCK REGULATOR
FIGURE 50. CONCEPTUAL CONTROL BLOCK DIAGRAM
The output stage consists of a power stage (G_v(s)) which converts
the duty signal to output voltage and internal current loop stage
which converts duty to sense current.
POWER STAGE TRANSFER FUNCTIONS
Transfer function at power stage (G_v(s)) can be expressed as
Equation 27.
G_vs
=
V
I
N



1
+
-_----_e^s---_s---_{r}
 ------------------------¹--------------------------
1
+
--------^s----------
Q_p  _n
+


-_--^s--_n-_
2
(EQ. 27)
Where,
_esr
=
--------------¹---------------
C_OUT  R_esr
Q_p  R_OUT 
C_{----O----U----T}
L
_n
=
-----------¹-------------
L  C_OUT
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FN8657.3
December 12, 2014