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ISL78268 Datasheet, PDF (26/33 Pages) Intersil Corporation – Integrated 2A sourcing
ISL78268
Fault Monitoring and Protection
The ISL78268 actively monitors input/output voltage and current to
detect fault conditions. Fault monitors trigger protective measures
to prevent damage to the load.
PGOOD SIGNAL
The Power-Good indicator pin (PGOOD pin) is provided for fault
monitoring. The PGOOD pin is an open-drain logic output to
indicate that the soft-start period is completed and the output
voltage is within the specified range. An external pull-up resistor
(10kΩ to 100kΩ) is required to be connected between PGOOD
pin and VCC or external power supply (5.5V max). This pin is
pulled low during soft-start. The PGOOD pin is released high after
the voltage on SS pin reaches SS clamp voltage (3.4V typ) and
after a 0.5ms (typ) delay. PGOOD will be pulled low with a
10µs (typ) blanking filter when output UV, or OV fault, or VIN OV
fault occurs, or EN is pulled low. The PGOOD will be released high
after the 0.5ms (typ) delay when the above faults are removed.
HICCUP/LATCH-OFF OPERATION
As a response to fault detection, either Hiccup or Latch-off mode can
be selected by the configuration of the HIC/LATCH pin. When the
HIC/LATCH pin is pulled high (VCC), the fault response will be Hiccup
mode. When HIC/LATCH pin is pulled low (GND), the fault response
will be in Latch-off mode.
In Hiccup mode, the device will stop switching when a fault
condition is detected, and restart from soft-start after
500ms (typ). This operation will be repeated until fault conditions
are completely removed.
In Latch-off mode, the device will stop switching when a fault
condition is detected and be kept off even after fault conditions
are removed. Either toggling the EN pin or cycling VIN below the
POR threshold will restart the system.
INPUT OVERVOLTAGE PROTECTION
The ISL78268 features overvoltage (OV) fault protection for the
input supply. When VIN is higher than 58V (typ), the UG and LG
gate drivers are disabled and the PGOOD pin is pulled low. There is
a 10µs (typ) transient filter to prevent noise spikes from triggering
input OV. The input OV response can be selected as latch-off or
hiccup.
The recovery from output overvoltage in hiccup or latch-off is the
same as described in “Hiccup/Latch-off Operation”. If the hiccup
mode is selected, the input OV recovery threshold is below 55V (typ).
OUTPUT UNDERVOLTAGE DETECTION
The ISL78268 detects the output undervoltage condition. The
output undervoltage threshold is set at 87.5% (typ) of the 1.6V FB
reference voltage. When the FB voltage is below the undervoltage
threshold for more than 10µs (typ), the PGOOD pin is pulled down.
If the output voltage rises above the undervoltage recovery
threshold of 90.5% (typ) of FB reference voltage, PGOOD is pulled
up after 0.5ms (typ) delay. During an undervoltage condition, the
device continues normal operation unless either OC2, AVGOCP,
Input OVP, or thermal shutdown protection is triggered.
OUTPUT OVERVOLTAGE DETECTION/PROTECTION
The ISL78268 output overvoltage detection circuit is active after
soft-start is completed. The output voltage is monitored at the FB
pin and the output overvoltage trip point is set to 115% (typ) of
the FB reference voltage. If the output overvoltage condition is
longer than 10µs (typ) blanking time, the PGOOD pin is pulled
down and the controller moves into hiccup or latch-off mode.
The recovery from output overvoltage in hiccup or latch-off is the
same as described in “Hiccup/Latch-off Operation”. If the hiccup
mode is selected, the output OV recovery threshold is 112% (typ)
of FB reference voltage.
CYCLE-BY-CYCLE PEAK OVERCURRENT
LIMITING/PROTECTION
ISL78268 features cycle-by-cycle peak overcurrent protections by
sensing the peak current at CSA1. The IC continuously compares
the CSA1 output current (ISEN1 calculated from Equation 4),
which is proportional to the current flowing at Current Sense
Resistor1 (RSEN1) with two overcurrent protection threshold,
70µA for OC1 and 93µA for OC2.
The OC1 and OC2 levels are defined as Equations 12 and 13.
IOC1
=
70  10–6  -R----S---E----T-
RSEN
(EQ. 12)
IOC2
=
93  10–6  -R----S---E----T-
RSEN
(EQ. 13)
If ISEN1 reaches OC1 threshold, the high-side MOSFET is turned
off. This reduces the converter duty cycle which decreases the
output voltage.
After OC1 protection has reduced the controller down to
minimum duty cycle, if the output current increases to the OC2
threshold for three consecutive switching cycles, the controller
disables the gate drivers and enters hiccup or latch-off mode.
The recovery from OC2 in hiccup or latch-off is the same as
described in the “Hiccup/Latch-off Operation”.
The OC1 cycle-by-cycle current limiting and OC2 protection are
active during soft-start and normal operation period.
AVERAGE OVERCURRENT PROTECTION
When the average constant current control loop is active, the IC
also provides average overcurrent protection.
When output current increases even the duty cycle becomes
minimum by the average constant current control loop, the
VIMON voltage rises above 1.6V. If VIMON reaches 2V (typ), the
ISL78268 stops gate drivers and enters into the hiccup mode.
This provides additional safety for the voltage regulator.
Equation 14 provides the RIMON value for the desired average
overcurrent protection level IOCPAVG.
RIMON
=
----------------------------------1----6-----------------------------------
IOC
PA
VG

R-----S---E---N--
RSET
+
68

10–6
(EQ. 14)
The average overcurrent protection (2V REF at IMON/DE) will not
be asserted until the soft-start period is completed.
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FN8657.3
December 12, 2014