ISL78268 Datasheet, PDF (27/33 Pages) Intersil Corporation – Integrated 2A sourcing

ISL78268
NEGATIVE CURRENT LIMIT
When operating in Forced PWM mode operation in light load, the
negative current from the output capacitor to GND flows by the
turn on of the low-side MOSFET. The ISL78268 provides
cycle-by-cycle negative current limit to prevent excess negative
current. Equation 15 shows the peak negative current limit
(I_NEGLIM) threshold.
I_NEGLIM
=
–50  10^–6  -^R----^S---^E----^T-
R_SEN
(EQ. 15)
THERMAL PROTECTION
If the junction temperature reaches +160°C (typ), the ISL78268
switching will be disabled and enter into hiccup or latch-off
mode. When hiccup mode is selected, a 15°C (typ) hysteresis
insures that the device will not restart until the junction
temperature drops below +145°C (typ) in Hiccup mode.
Internal 5.2V LDO
The ISL78268 has an internal LDO with input at VIN and a fixed
5.2V/100mA output at PVCC. A 4.7µF, 10V or higher X5R or X7R
rated ceramic capacitor is recommended between PVCC to GND.
The output of this LDO is mainly used as the bias supply of the
internal circuitry. To provide a quiet power rail to the internal
analog circuitry, it is recommended to place RC filter between
PVCC and VCC. A 10Ω resistor between PVCC and VCC and at
least 1µF ceramic capacitor from VCC to GND are recommended.
OUTPUT CURRENT LIMITATION OF INTERNAL LDO
The internal LDO tolerates an input supply range of VIN up to 55V
(60V absolute maximum). However, the power losses at the LDO
need to be considered, especially when the gate drivers are
driving external MOSFETs with a large gate charge. At high V_IN,
the LDO has significant power dissipation that may raise the
junction temperature where the thermal shutdown occurs.
Figure 47 shows the relationship between maximum allowed
LDO output current and input voltage. The curves are based on
+39°C/W thermal resistance _JA of the package.
160
140
T_A = +25°C
120
100
80
60
T_A = +75°C
40
T_A= +125°C
20
0
5 10 15 20 25 30 35 40 45 50 55 60
V_IN (V)
FIGURE 47. POWER DERATING CURVE
The maximum LDO current can be supplemented with an
external PNP transistor as shown in Figure 48. The advantage is
that the majority of the power dissipation can be moved from the
ISL78268 to the external transistor. Choose R_S to be 68Ω so that
the LDO delivers about 10mA when the external transistor begins
to turn on. The external circuit increases the minimum input
voltage to approximately 6.5V.
VIN
Rs
ISL78268
VIN
PVCC
PVCC
FIGURE 48. SUPPLEMENTING LDO CURRENT
Application Information
There are several ways to define the external components and
parameters of buck regulators. This section shows one example
of how to decide the parameters of the external components
based on the typical application schematics shown in Figure 4 on
page 8. In the actual application, the parameters may need to be
adjusted and also a few more additional components may need
to be added for the application specific noise, physical sizes,
thermal, testing and/or other requirements.
Output Voltage Setting
The output voltage (V_OUT) of the regulator can be programmed by
an external resistor divider set from V_OUT to FB and FB to GND.
V_OUT can be defined as:
V_out
=
1.6




1
+
R^{-R----FF---BB---10--}_{}
(EQ. 16)
In the actual application, the resistor value should be decided by
considering the quiescent current requirement and loop
response. Typically, between 10kΩ to 30kΩ will be used for the
RFB0.
Switching Frequency
Switching frequency may be determined by considering several
requirements such as system level response time, solution size,
EMC/EMI limitation, power dissipation and efficiency, ripple
noise level, minimum and maximum input voltage range, etc.
Higher frequency may improve the transient response and help
to minimize the solution size. However, this may increase the
switching losses and EMC/EMI concerns. Thus, a balance of
these parameters are needed when deciding the switching
frequency.
Once the switching frequency is decided, the frequency setting
resistor (R_SYNC) can be determined by Equation 1.
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FN8657.3
December 12, 2014