ISL78268 Datasheet, PDF (32/33 Pages) Intersil Corporation – Integrated 2A sourcing

ISL78268
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to
make sure you have the latest Rev.
DATE
REVISION
CHANGE
December 12, 2014
FN8657.3
Functional Pin Description
Page 3, FSYNC description. Changed from: There is a 100ns delay from the FSYNC pin's….
To: There is a 325ns delay from the FSYNC pin's….
Page 4, PVCC description. Changed from: The PVCC operating range is 4V to 5.4V.
To: The PVCC operating range is 4.75V to 5.5V.
VCC description. Changed from: range of 4.7V to 5.5V, To: range of 4.75V to 5.5V,
Typical Application Schematics
Page 7, Left side changed from: HIC/LATCH:Connect to either Vcc for Latch-off mode or GND for Hiccup mode
To: HIC/LATCH:Connect to either Vcc for Hiccup mode or GND for Latch-off mode
Page 8, Left side changed from: HIC/LATCH:Connect to either Vcc for Latch-off mode or GND for Hiccup mode
To: HIC/LATCH:Connect to either Vcc for Hiccup mode or GND for Latch-off mode
Page 9, Left side changed from: HIC/LATCH:Connect to either Vcc for Latch-off mode or GND for Hiccup mode
To: HIC/LATCH: Connect to either Vcc for Hiccup mode or GND for Latch-off mode
Page 10, Electrical specification table, Test condition of Input Voltage range, changed from "For VIN = 5 the
internal ... " to "For VIN = 5V, the internal ..."
Elecrical Spec table, Page 11, Phase Lock Loop Locking Time
Changed in Test Conditions: Cpllcmp2=_nF to: Cpllcmp2=1nF
Page 20, Operation Description, 2nd sentence changed from: "such as input and output overvoltage protection,
output overvoltage protection" to: "input overvoltage protection, output overvoltage protection"
Page 22, SYNCHRONIZATION WITH EXTERNAL CLOCK, 2nd paragaph
Changed from : The delay time of UG rising from the external clock rising edge is 100ns (typ).
To: The delay time of UG rising from the external clock rising edge is 325ns (typ).
Page 25, Figure 46 changed: "ma1 = Ma + mSL" to: "ma1 = ma + mSL"
Page 30, EQ. 30 changed : mn=RS*…… to: ma=RS*……
Figure 51 changed: mb to: ma
August 1, 2014
FN8657.2 On page 1 in the Features section, updated the 5th bullet from “Low shutdown current, IQ<3µA” to “Low
shutdown current, IQ<1µA”.
In the “Block Diagram” on page 6, reversed the “+” and “-” Gm_Amp input polarity.
July 22, 2014
FN8657.1 Added Related Literature section on page 1 and ISL78268EVAL1Z information to the ordering information table
on page 5
June 18, 2014
FN8657.0 Initial Release.
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FN8657.3
December 12, 2014