ISL35822 Datasheet, PDF (56/75 Pages) Intersil Corporation – Octal 2.488Gbps to 3.187Gbps/ Lane Retimer

PIN#
P11
R11
R12
T12
P12
N12
T11
NAME
MDIO
MDC
PADR[4]
PADR[3]
PADR[2]
PADR[1]
PADR[0]
ISL35822
Table 98. MANAGEMENT DATA INTERFACE PINS
TYPE
DESCRIPTION
I/O (open drain output) Management Address/Data I/O. 1.2V CMOS input, 2.5V Tolerant
Input
Management Interface Clock. 1.2V CMOS, 2.5V Tolerant, with Schmitt trigger
Input
Management Port Address Setting 1.2V CMOS
PIN#
N11
P10
B9
A10
N10
D10
A11
B11
D7
D5
D6
N8
C5
A6
A5
A7
B7
D11
Table 99. MISCELLANEOUS PINS
NAME
TYPE
DESCRIPTION
MF[0]
MF[1]
MF[2]
Output
1.5V CMOS
Multi-function Outputs, Lanes 0 - 3. The functions of these pins are enabled via the MDIO
Interface.
The default condition for these pins is PHY XGXS BIST_ERR. See Table 81 (bits MF_SEL
and MF_CTRL) for further details.
MF[3]
RSTN
BIST_ENA
Input
Chip Reset (FIFO Clear) Assert RSTN for at least 10µs from power up. Active low. Schmitt
trigger input, 1.2V CMOS, 2.5V tolerant.
Input (with pulldown) Built-In Self Test Enable- Active High. When high, enables internal 2²³-1 byte PRBS test
function generator and checker. 1.5V CMOS
LX4_MODE
Input (with pulldown) CX4/LX4 Mode Select. When high, LX4 mode is selected. When low, CX4 mode is
selected. This pin decides the trigger sources of LASI, and the default pre-emphasis and
equalization strength of the high speed serial port on the PMA/PMD side. 1.5V CMOS
LASI
Output (open drain) Link Alarm Status Interrupt Request. When low, pin indicates the existence of an incorrect
condition. An external 10-22kΩ pull-up to 1.2V or 1.5V is recommended. 1.2V CMOS, 2.5V
tolerant.
OPTXLBC ⁽¹⁾ Input
TX Laser Bias Current. Optical monitoring input. Active level is latched into register bit
1.36868.9 and can be configured to trigger LASI. When this pin is not driven by an external
device, it should be pulled inactive (default down). 1.5V CMOS, 2.5V tolerant.
OPTTEMP⁽¹⁾ Input
Transceiver Temperature. Optical monitoring input. Active level is latched into register bit
1.36868.8 and can be configured to trigger LASI. When this pin is not driven by an external
device, it should be pulled inactive (default down). 1.5V CMOS, 2.5V tolerant.
OPTXLOP⁽¹⁾ Input
TX Laser Output Power. Optical monitoring input. Active level is latched into register bit
1.36868.7 and can be configured to trigger LASI. When this pin is not driven by an external
device, it should be pulled inactive (default down). 1.5V CMOS, 2.5V tolerant.
TX_FAULT⁽²⁾ Input
TX Fault Condition. Transmitter (Egress) external fault input. Active level is latched into
register bits 1.10 and 1.36868.6 and can be configured to trigger LASI. When this pin is not
driven by an external device, it should be pulled inactive (default down). 1.5V CMOS, 2.5V
tolerant.
OPRXOP⁽¹⁾
Input
Receive Optical Power. Optical monitoring input 4. Active level is latched into register bit
1.36867.5 and can be configured to trigger LASI. When this pin is not driven by an external
device, it should be pulled inactive (default down). 1.5V CMOS, 2.5V tolerant.
OPRLOS[3] ⁽¹⁾ Input
OPRLOS[2] ⁽¹⁾
OPRLOS[1] ⁽¹⁾
Optical Receiver Loss Of Signal. Optical monitoring input 5 – 8. Active (loss) levels are
latched into register 1.10 and can be configured to trigger LASI. When these pins are not
driven by an external device, they should pulled inactive (default down). 1.5V CMOS, 2.5V
tolerant.
OPRLOS[0] ⁽¹⁾
XP_ENA
Input
XENPAK Enable. Enable XENPAK support. Active high. Activates 2-wire serial bus
interface. 1.5V CMOS, 2.5V tolerant.
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