ISL35822 Datasheet, PDF(28/75 Page) Intersil Corporation – Octal 2.488Gbps to 3.187Gbps/ Lane Retimer

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ISL35822 Datasheet, PDF (28/75 Pages) Intersil Corporation – Octal 2.488Gbps to 3.187Gbps/ Lane Retimer

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ISL35822

Table 27. XENPAK LASI RX_ALARM STATUS REGISTER

MDIO REGISTER, ADDRESS = 1.36867 (1.9003âh)

BIT

NAME

SETTING

DEFAULT R/W

DESCRIPTION(1)

1.36867.15:6

Reserved

000âh

1.36867.6

1.36867.5

1.36867.4

1.36867.3

PCS Byte Synch

RX Receive

Power/Level

PMA LF

1 = Alarm Condition is 0âb

Detected

0âb

0 = No Alarm Condition

is Detected

0âb

PCS LF

0âb

RO/LH

PCS Byte Sync Fail (logical NAND of bits 3.24.[3:0])

LX4: Receive Laser Power from OPRXOP pin (for

polarity see 1.49181)

CX4: Loss of Signal Detect(3)

PMA/PMD RX Local Fault: mirror to bit 1.8.10(2)

PCS RX Local Fault: mirror to bit 3.8.10(2)

1.36867.2

PCS Code

0âb

RO/LH PCS 8b/10b Code Violation in any lane of PCS

1.36867.1

1.36867.0

DOM RXFlg/

RX EFIFO

PHY RX LF

0âb

RO/LH LX4: DOM RX_Flag (from polling)

CX4: RX EFIFO over/underflow Fault

0âb

RO/LH PHY RX Local Fault Status: mirror to bit 4.8.10(2)

Note (1): Where two descriptions are given, depends on LX4/CX4 select LX4_MODE pin. First value is LX4 value

Note (2): These mirrored bits will be cleared on a read of either this register or of their respective mirroring registers.

Note (3): This bit is derived from the OR of the LOS bits (1.C00A.3:0). In the case of a signal which is close to the LOS threshold value, so that LOS is changing over

time for one or more lanes, this bit may give a âFAILâ indication even though the SIGNAL_DETECT function declares the signal âGOODâ, and Byte Synch and

Lane Align all indicate a âGOODâ signal.

Table 28. XENPAK LASI TX_ALARM STATUS REGISTER

MDIO REGISTER, ADDRESS = 1.36868 (1.9004âh)

BIT

NAME

SETTING

DEFAULT R/W

DESCRIPTION(1)

1.36868.15:11

Reserved

000âh

1.36868.10

PHY S_D

1 = Alarm Condition is 0âb

Detected

RO/ LH LX4: No fail detected

CX4: PHY XS Signal Detect Fail (XAUI)

1.36868.9

LBC

0 = No Alarm

0âb

Condition is Detected

RO LH

LX4: Laser Bias Current Fault (from OPTXLBC pin, for

polarity see 1.49181)

CX4: No failure detectable

1.36868.8

LTEMP

0âb

RO LH LX4: Laser Temperature Fault (from OPTTEMP pin, for

polarity see 1.49181)

CX4: No failure detectable

1.36868.7

LOP

0âb

RO LH LX4: Laser Output Power Fault (from OPTXLOP pin, for

polarity see 1.49181)

CX4: No failure detectable

1.36868.6

TX LF

0âb

RO LH Transmit Local Fault (from TX_FAULT pin, for polarity

see 1.49170)

1.36868.5

1.36868.4

1.36868.3

Byte Sync

PMA LF

PCS LF

0âb

RO LH LX4: No fail detected

CX4: PHY XS Byte Sync Fail Status

0âb

RO LH PMA TX Local Fault Status: mirror to bit 1.8.11(2)

0âb

RO LH LX4: PCS TX Local Fault Status: mirror to bit 3.8.11(2)

CX4: No failure detectable

1.36868.2

TX EFIFO

0âb

RO LH LX4: No fail detected

CX4: Transmit EFIFO Error Status

1.36868.1

1.36868.0

DOM TX/

PHY Code

PHY TX LF

0âb

RO LH LX4: DOM TX_Flag (from polling)

CX4: PHY XS 8b/10b Code Violation

0âb

RO LH PHY TX Local Fault Status: mirror to bit 4.8.11(2)

Note (1): Where two descriptions are given, depends on LX4/CX4 select LX4_MODE pin. First value is LX4 value

Note (2): These mirrored bits will be cleared on read of either this register or their respective registers.

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