ISL35822 Datasheet, PDF (1/75 Pages) Intersil Corporation – Octal 2.488Gbps to 3.187Gbps/ Lane Retimer

®
Data Sheet
June 29, 2005
ISL35822
FN6165.0.0
Octal 2.488Gbps to 3.187Gbps/
Lane Retimer
• 0.13mm Pure-Digital CMOS Technology
• 1.5V Core Supply, Control I/O 2.5V Tolerant
Features
• 8 Lanes of Clock & Data Recovery and Retiming; 4 in
Each Direction
• Differential Input/Output
• Wide Operating Data Rate Range: 2.488Gbps to
3.1875Gbps, and 1.244Gbps to 1.59325Gbps
• Ultra Low-Power Operation (163mW typical per lane,
1300mW typical total consumption, LX4 mode)
• Low Power Version Available for LX4 Applications
• 17mm Square Low Profile 192 pin 1.0mm Pitch EBGA-B
Package
• Compliant to the IEEE 802.3 10GBASE-LX4(WWDM),
10GBASE-CX4, and XAUI Specifications
• Reset Jitter Domain
• Meets 802.3ae and 802.3ak Jitter Requirements with
Significant Margin
• Clock Compensation
• Tx/Rx Rate Matching via IDLE Insertion/Deletion up to
±100ppm Clock Difference
• Receive Signal Detect and 16 Levels of Receiver
Equalization for Media Compensation
• CML CX4 Transmission Output with 16 Settable Levels of
Pre-Emphasis, Eight on XAUI Side
• Single-Ended or Differential Input Lower-Speed Reference
Clock
• Ease of Testing
• Complete Suite of Ingress-Egress Loopbacks
• Full 802.3ae Pattern Generation and Test, including
CJPAT & CRPAT
• PRBS (both 2²³-1 and 13458 byte) Built-In Self Tests,
Error Flags and Count Output
• JTAG and AC-JTAG Boundary Scan
• Received Data Aligned to Local Reference Clock for
Retransmission
• Long Run Length (512 bit) Frequency Lock Ideal for
Proprietary Encoding Schemes
• Increase Driving Distance
• LX4: Up to 40 inches of FR-4 Traces or 500 Meters of
MMF Fiber at 3.1875Gbps
• CX4: Over 15 meters of Compatible Cable
• Extensive Configuration and Status Reporting via 802.3
Clause 45 Compliant MDC/MDIO Serial Interface
• Automatic Load of ISL35822 Control and all XENPAK
Registers from EEPROM or DOM Circuit
• Deskewing and Lane-to-Lane Alignment
Figure 1. FUNCTIONAL BLOCK DIAGRAM
Egress 3
Egress 2
Egress 1
Egress 0
Ingress 3
Ingress 2
Ingress 1
Ingress 0
RX0N
RX0P
Clock &
Data
Recovery
Deserializer
and Comma
Detector
8B/10B
Decoder
Receive
FIFO
Receive
Parallel
Data
8B/10B
Encoder
& Mux
TX0N
TX0P
RFCP
RFCN
Clock Multiplier
3.125G
MDIO MDC
MDIO/MDC
Register File
I²C Interface
SCL SDA
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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