ISL6322G Datasheet, PDF (29/39 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers, I2C Interface and Phase Dropping

ISL6322G
TABLE 8. REGISTER RGS1 (VOLTAGE MARGINING
OFFSET) (Continued)
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
V_OFFSET
X X VO5 VO4 VO3 VO2 VO1 VO0 (mV)
x
x
0
0
1
0
1
0
125.0
x
x
0
0
1
0
1
1
137.5
x
x
0
0
1
1
0
0
150.0
x
x
0
0
1
1
0
1
162.5
x
x
0
0
1
1
1
0
175.0
x
x
0
0
1
1
1
1
187.5
x
x
0
1
0
0
0
0 200.00
x
x
0
1
0
0
0
1
212.5
x
x
0
1
0
0
1
0
225.0
x
x
0
1
0
0
1
1
237.5
x
x
0
1
0
1
0
0
250.0
x
x
0
1
0
1
0
1
262.5
x
x
0
1
0
1
1
0
275.0
x
x
0
1
0
1
1
1
287.5
x
x
0
1
1
0
0
0
300.0
x
x
0
1
1
0
0
1
312.5
x
x
0
1
1
0
1
0
325.0
x
x
0
1
1
0
1
1
337.5
x
x
0
1
1
1
0
0
350.0
x
x
0
1
1
1
0
1
362.5
x
x
0
1
1
1
1
0
375.0
x
x
0
1
1
1
1
1
387.5
x
x
1
0
0
0
0
0
400.0
x
x
1
0
0
0
0
1
412.5
x
x
1
0
0
0
1
0
425.0
x
x
1
0
0
0
1
1
437.5
x
x
1
0
0
1
0
0
450.0
x
x
1
0
0
1
0
1
462.5
x
x
1
0
0
1
1
0
475.0
x
x
1
0
0
1
1
1
487.5
x
x
1
0
1
0
0
0
500.0
x
x
1
0
1
0
0
1
512.5
x
x
1
0
1
0
1
0
525.0
x
x
1
0
1
0
1
1
537.5
x
x
1
0
1
1
0
0
550.0
x
x
1
0
1
1
0
1
562.5
x
x
1
0
1
1
1
0
575.0
x
x
1
0
1
1
1
1
587.5
TABLE 8. REGISTER RGS1 (VOLTAGE MARGINING
OFFSET) (Continued)
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
V_OFFSET
X X VO5 VO4 VO3 VO2 VO1 VO0 (mV)
x
x
1
1
0
0
0
0
600.0
x
x
1
1
0
0
0
1
612.5
x
x
1
1
0
0
1
0
625.0
x
x
1
1
0
0
1
1
637.5
x
x
1
1
0
1
0
0
650.0
x
x
1
1
0
1
0
1
662.5
x
x
1
1
0
1
1
0
675.0
x
x
1
1
0
1
1
1
687.5
x
x
1
1
1
0
0
0
700.0
x
x
1
1
1
0
0
1
712.5
x
x
1
1
1
0
1
0
725.0
x
x
1
1
1
0
1
1
737.5
x
x
1
1
1
1
0
0
750.0
x
x
1
1
1
1
0
1
762.5
x
x
1
1
1
1
1
0
775.0
x
x
1
1
1
1
1
1
787.5
29
FN6715.0
May 22, 2008