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ISL6322G Datasheet, PDF (13/39 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers, I2C Interface and Phase Dropping
ISL6322G
.
MOSFET
DRIVER
VIN
UGATE(n)
LGATE(n)
ISL6322G INTERNAL CIRCUIT
IL
L
DCR
INDUCTOR
VL(s)
VC(s)
R1
C
R2*
VOUT
COUT
ISEN(n)
SAMPLE
+
-
ISEN(n)
VC(s)
RISEN
ISEN-(n)
ISEN+(n)
*R2 is OPTIONAL
FIGURE 5. INDUCTOR DCR CURRENT SENSING
CONFIGURATION
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 5. The channel-current
IL, flowing through the inductor, passes through the DCR.
Equation 3 shows the S-domain equivalent voltage, VL,
across the inductor.
VL(s) = IL ⋅ (s ⋅ L + DCR)
(EQ. 3)
A simple R-C network across the inductor (R1 and C)
extracts the DCR voltage, as shown in Figure 5. The voltage
across the sense capacitor, VC, can be shown to be
proportional to the channel-current IL, shown in Equation 4.
⎛
⎝
--s-----⋅---L---
DCR
+
1⎠⎞
VC(s)
=
-------------------------------------
(s ⋅ R1 ⋅ C + 1)
⋅
DCR
⋅
IL
(EQ. 4)
In some cases it may be necessary to use a resistor divider
R-C network to sense the current through the inductor. This
can be accomplished by placing a second resistor, R2,
across the sense capacitor. In these cases the voltage
across the sense capacitor, VC, becomes proportional to the
channel-current IL, and the resistor divider ratio, K.
⎛
⎝
--s-----⋅---L---
DCR
+
1⎞⎠
VC(s)
=
-------------------------------------------------------
⎛
⎜
⎝
s
⋅
(---R----1-----⋅---R----2----)
R1 + R2
⋅
C
+
⎞
1⎟
⎠
⋅
K
⋅
D
C
R
⋅
IL
(EQ. 5)
K
=
-------R-----2--------
R2 + R1
(EQ. 6)
If the R-C network components are selected such that the
RC time constant matches the inductor L/DCR time
constant, then VC is equal to the voltage drop across the
DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1.
The capacitor voltage VC, is then replicated across the
sense resistor RISEN. The current through RISEN is
proportional to the inductor current. Equation 7 shows that
the proportion between the channel-current and the sensed
current (ISEN) is driven by the value of the sense resistor,
the resistor divider ratio, and the DCR of the inductor.
ISEN
=
K
⋅
I
L
⋅
---D----C-----R-----
RISEN
(EQ. 7)
Output Voltage Setting
The ISL6322G uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3, 4 and 5. In Intel
modes of operation, each VID pin is pulled up to an internal
1.2V voltage by a weak current source (40µA), which
decreases to 0A as the voltage at the VID pin varies from 0
to the internal 1.2V pull-up voltage. In AMD modes of
operation the VID pins are pulled low by a weak 20µA
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
The ISL6322G accommodates four different DAC ranges:
Intel VR10 (Extended), Intel VR11, AMD K8/K9 5-bit, and
AMD 6-bit. The state of the VRSEL and VID7 pins decide
which DAC version is active. Refer to Table 1 for a
description of how to select the desired DAC version.
TABLE 1. ISL6322G DAC SELECT TABLE
DAC VERSION
VRSEL PIN
VID7 PIN
VR10 (Extended)
VRSEL < 0.6V
-
VR11
0.8V < VRSEL < 3.0V
-
AMD 5-bit
3.0V < VRSEL < VCC
Low
AMD 6-bit
3.0V < VRSEL < VCC
High
TABLE 2. VR10 (EXTENDED) VOLTAGE IDENTIFICATION
CODES
VID4 VID3 VID2 VID1 VID0 VID5 VID6 VDAC
0
1
0
1
0
1
1 1.60000
0
1
0
1
0
1
0 1.59375
13
FN6715.0
May 22, 2008