ISL6377 Datasheet, PDF (19/36 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion™ Desktop CPUs Using SVI 2.0

ISL6377
In a 1-phase configuration, the ISEN2_NB pin is tied to +5V. The
Northbridge VR operates in 1-phase CCM when both PSI0_L and
PSI1_L are high and continues in this mode when PSI0_L is
taken low. The controller enters 1-phase DE mode when both
PSI0_L and PSI1_L are low.
The Northbridge VR can be disabled completely by tieing
ISEN1_NB to 5V.
Dynamic Operation
Core and Northbridge VRs behave the same during dynamic
operation. The controller responds to VID-on-the-fly changes by
slewing to the new voltage at the slew rate programmed, see
Table 4. During negative VID transitions, the output voltage
decays to the lower VID value at the slew rate determined by the
load.
The R³â„¢ modulator intrinsically has voltage feed-forward. The
output voltage is insensitive to a fast slew rate input voltage
change.
Adaptive Body Diode Conduction Time
Reduction
In DCM, the controller turns off the low-side MOSFET when the
inductor current approaches zero. During on-time of the low-side
MOSFET, phase voltage is negative, and the amount is the
MOSFET r_DS(ON) voltage drop, which is proportional to the
inductor current. A phase comparator inside the controller
monitors the phase voltage during on-time of the low-side
MOSFET and compares it with a threshold to determine the zero
crossing point of the inductor current. If the inductor current has
not reached zero when the low-side MOSFET turns off, it will flow
through the low-side MOSFET body diode, causing the phase
node to have a larger voltage drop until it decays to zero. If the
inductor current has crossed zero and reversed the direction
when the low-side MOSFET turns off, it will flow through the
high-side MOSFET body diode, causing the phase node to have a
spike until it decays to zero. The controller continues monitoring
the phase voltage after turning off the low-side MOSFET. To
minimize the body diode-related loss, the controller also adjusts
the phase comparator threshold voltage accordingly in iterative
steps such that the low-side MOSFET body diode conducts for
approximately 40ns.
Resistor Configuration Options
The ISL6377 uses the COMP, COMP_NB and FCCM_NB pins to
configure some functionality within the IC. Resistors from these
pins to GND are read during the first portion of the soft-start
sequence. The following sections outline how to select the
resistor values for each of these pins to correctly program the
output voltage offset of each output, the configuration of the
floating DriverX and PWM_Y output, VID-on-the-Fly slew rate, and
switching frequency used for both VRs.
VR Offset Programming
A positive or negative offset is programmed for the Core VR using
a resistor to ground from the COMP pin and the Northbridge in a
similar manner from the COMP_NB pin. Table 3 provides the
resistor value to select the desired output voltage offset. The 1%
tolerance resistor value shown in the table must be used to
program the corresponding Core or NB output voltage offset. The
MIN and MAX tolerance values provide margin to insure the 1%
tolerance resistor will be read correctly.
TABLE 3. COMP & COMP_NB OUTPUT VOLTAGE OFFSET SELECTION
RESISTOR VALUE [kΩ]
MIN 1% TOLERANCE MAX
TOLERANCE VALUE
TOLERANCE
COMP COMP_NB
V_{CORE OFFSET} OFFSET
[mV]
[mV]
5.54
5.62
5.70
-43.75
18.75
7.76
7.87
7.98
-37.5
31.25
11.33
11.5
11.67
-31.25
43.76
16.65
16.9
17.15
-25
50
19.3
19.6
19.89
-18.75
37.5
24.53
24.9
25.27
-12.5
25
33.49
34.0
34.51
-6.25
12.5
40.58
41.2
41.81
6.25
0
51.52
52.3
53.08
18.75
18.75
72.10
73.2
74.29
31.25
31.25
93.87
95.3
96.72
43.76
43.76
119.19
121
112.81
50
50
151.69
154
156.31
37.5
37.5
179.27
182
184.73
25
25
206.85
210
213.15
12.5
12.5
OPEN
0
0
Floating DriverX and PWM_Y Configuration
The ISL6377 allows for one internal driver and one PWM output
to be configured to opposite VRs depending on the desired
configuration of the Northbridge VR. Internal DriverX can be used
as Channel 1 of the Northbridge VR with PWM_Y used for
Channel 3 of the Core VR. Using this partitioning, a 2+1 or 1+1
configured ISL6377 would not require an external driver.
If routing of the driver signals would be a cause of concern due to
having an internal driver on the Northbridge VR, then the
ISL6377 can be configured to use PWM_Y as Channel 1 on the
Northbridge VR. DriverX would then be used as Channel 3 of the
Core VR. This allows the placement of the external drivers for the
Northbridge VR to be closer to the output stage(s) depending on
the number of active Phases, providing placement and layout
flexibility to the Northbridge VR.
The floating internal driver and PWM output are configured
based on the programming resistor from FCCM_NB to GND. The
FCCM_NB programming resistor value also sets the slew rate and
switching frequency of the Core and Northbridge VRs. These
features are outlined in the following sections. Table 4 shows
which resistor values sets the configuration and slew rate for the
ISL6377. The resistor value shown in the table must be used and
the resistor tolerance must be 1%. The MIN and MAX tolerance
around each resistor value is the same as Table 3 and provides
margin to insure the 1% tolerance resistor will be read correctly.
19
FN8336.0
August 6, 2012