ISL6377 Datasheet, PDF (16/36 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion™ Desktop CPUs Using SVI 2.0

ISL6377
Rdroop
+Vdroop-
FB
COMP
+
E/A
-
Idroop
Σ
DAC
VDAC
+
INTERNAL TO IC
+
X1
-
VCCSENSE
VR LOCAL VO
“CATCH” RESISTOR
SVC
SVD
SVID[7:0]
RTN
VSSSENSE
VSS
“CATCH” RESISTOR
FIGURE 13. DIFFERENTIAL SENSING AND LOAD LINE
IMPLEMENTATION
As the load current increases from zero, the output voltage
droops from the VID programmed value by an amount
proportional to the load current, to achieve the load line. The
ISL6377 can sense the inductor current through the intrinsic DC
Resistance (DCR) of the inductors, as shown in Figures 3 and 4,
or through resistors in series with the inductors as shown in
Figure 5. In both methods, capacitor C_n voltage represents the
total inductor current. An internal amplifier converts C_n voltage
into an internal current source, I_sum, with the gain set by resistor
R_i, see Equation 1.
I_sum
=
V_-----C----n-
R_i
(EQ. 1)
The I_sum current is used for load line implementation, current
monitoring on the IMON pins and overcurrent protection.
Figure 13 shows the load-line implementation. The ISL6377
drives a current source (I_droop) out of the FB pin which is a ratio
of the I_sum current, as described by Equation 2.
I_droop
=
5_--
4
×
I_s
um
=
5_--
4
×
-^V----^C----ⁿ-
R_i
(EQ. 2)
When using inductor DCR current sensing, a single NTC element
is used to compensate the positive temperature coefficient of the
copper winding, thus sustaining the load-line accuracy with
reduced cost.
I_droop flows through resistor R_droop and creates a voltage drop as
shown in Equation 3.
V_droop = R_droop × I_droop
(EQ. 3)
V_droop is the droop voltage required to implement load line.
Changing R_droop or scaling I_droop can change the load line slope.
Since I_sum sets the overcurrent protection level, it is
recommended to first scale I_sum based on OCP requirement,
then select an appropriate R_droop value to obtain the desired
load line slope.
Differential Sensing
Figure 13 also shows the differential voltage sensing scheme.
VCC_SENSE and VSS_SENSE are the remote voltage sensing signals
from the processor die. A unity gain differential amplifier senses
the VSS_SENSE voltage and adds it to the DAC output. The error
amplifier regulates the inverting and non-inverting input voltages
to be equal as shown in Equation 4:
V
C
C_SENSE
+
V
dr
oo
p
=
V_DAC + VSS_SENSE
(EQ. 4)
Rewriting Equation 4 and substituting Equation 3 gives Equation 5
the exact equation required for load-line implementation.
VCC_SENSE – VSS_SENSE = V_DAC – R_droop × I_droop
(EQ. 5)
The VCC_SENSE and VSS_SENSE signals come from the processor die.
The feedback is open circuit in the absence of the processor. As
Figure 13 shows, it is recommended to add a “catch” resistor to feed
the VR local output voltage back to the compensator, and to add
another “catch” resistor to connect the VR local output ground to the
RTN pin. These resistors, typically 10Ω~100Ω, provide voltage
feedback if the system is powered up without a processor installed.
Phase Current Balancing
ISEN4
PHASE4
R_isen
C_isen
ISEN3
PHASE3
R_isen
C_isen
ISEN2
PHASE2
R_isen
C_isen
ISEN1
PHASE1
R_isen
C_isen
L4
R_{dcr4 Rpcb4}
I_L4
L3
R_{dcr3 Rpcb3}
I_L3
L2
R_{dcr2 Rpcb2}
V_O
I_L2
L1
R_{dcr1 Rpcb1}
I_L1
FIGURE 14. CURRENT BALANCING CIRCUIT
The ISL6377 monitors individual phase average current by
monitoring the ISEN1, ISEN2, ISEN3, and ISEN4 voltages.
Figure 14 shows the recommended current balancing circuit for
DCR sensing. Each phase node voltage is averaged by a low-pass
filter consisting of R_isen and C_isen, and is presented to the
corresponding ISEN pin. R_isen should be routed to the inductor
phase-node pad in order to eliminate the effect of phase node
parasitic PCB DCR. Equations 6 through 9 give the ISEN pin
voltages:
V_ISEN1 = (R_dcr1 + R_pcb1) × I_L1
(EQ. 6)
V_ISEN2 = (R_dcr2 + R_pcb2) × I_L2
(EQ. 7)
V_ISEN3 = (R_dcr3 + R_pcb3) × I_L3
(EQ. 8)
V_ISEN4 = (R_dcr4 + R_pcb4) × I_L4
(EQ. 9)
where R_dcr1, R_dcr2, R_dcr3 and R_dcr4 are inductor DCR; R_pcb1,
R_pcb2, R_pcb3 and R_pcb4 are parasitic PCB DCR between the
inductor output side pad and the output voltage rail; and I_L1, I_L2,
I_L3 and I_L4 are inductor average currents.
16
FN8336.0
August 6, 2012