80C187 Datasheet, PDF (6/30 Pages) Intel Corporation – 80-BIT MATH COPROCESSOR

80C187
ES is set if any unmasked exception bit is set cleared otherwise
See Table 2 for interpretation of condition code
TOP values
000 e Register 0 is Top of Stack
001 e Register 1 is Top of Stack



111 e Register 7 is Top of Stack
For definitions of exceptions refer to the section entitled
‘‘Exception Handling’’
Figure 4 Status Word
270640 – 3
6