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80C187 Datasheet, PDF (11/30 Pages) Intel Corporation – 80-BIT MATH COPROCESSOR
80C187
Exception
Invalid
Operation
Denormalized
Operand
Zero Divisor
Overflow
Underflow
Inexact
Result
(Precision)
Table 6 Exceptions
Cause
Operation on a signalling NaN
unsupported format indeterminate
form (0 % 0 0) (a %)
a (b %) etc ) or stack
overflow underflow (SF is also set)
At least one of the operands is
denormalized i e it has the smallest
exponent but a nonzero significand
The divisor is zero while the dividend
is a noninfinite nonzero number
The result is too large in magnitude
to fit in the specified format
The true result is nonzero but too small
to be represented in the specified format and
if underflow exception is masked denormalization
causes loss of accuracy
The true result is not exactly representable
in the specified format (e g 1 3)
the result is rounded according to the
rounding mode
Default Action
(If Exception is Masked)
Result is a quiet NaN
integer indefinite or
BCD indefinite
The operand is normalized
and normal processing
continues
Result is %
Result is largest finite
value or %
Result is denormalized
or zero
Normal processing
continues
Initialization
After FNINIT or RESET the control word contains
the value 037FH (all exceptions masked precision
control 64 bits rounding to nearest) the same values
as in an 8087 after RESET For compatibility with the
8087 the bit that used to indicate infinity control (bit
12) is set to zero however regardless of its setting
infinity is treated in the affine sense After FNINIT or
RESET the status word is initialized as follows
 All exceptions are set to zero
 Stack TOP is zero so that after the first push the
stack top will be register seven (111B)
 The condition code C3 – C0 is undefined
 The B-bit is zero
The tag word contains FFFFH (all stack locations
are empty)
80C186 80C187 initialization software should exe-
cute an FNINIT instruction (i e an FINIT without a
preceding WAIT) after RESET The FNINIT is not
strictly required for 80C187 software but Intel
recommends its use to help ensure upward compati-
bility with other processors
8087 Compatibility
This section summarizes the differences between
the 80C187 and the 8087 Many changes have been
designed into the 80C187 to directly support the
IEEE standard in hardware These changes result in
increased performance by elminating the need for
software that supports the standard
GENERAL DIFFERENCES
The 8087 instructions FENI FNENI and FDISI
FNDISI perform no useful function in the 80C187
Numeric Processor Extension They do not alter the
state of the 80C187 Numeric Processor Extension
(They are treated similarly to FNOP except that
ERROR is not checked ) While 8086 8087 code
containing these instructions can be executed on
the 80C186 80C187 it is unlikely that the exception-
handling routines containing these instructions will
be completely portable to the 80C187 Numeric Proc-
essor Extension
The 80C187 differs from the 8087 with respect to
instruction data and exception synchronization Ex-
cept for the processor control instructions all of the
80C187 numeric instructions are automatically syn-
chronized by the 80C186 CPU When necessary the
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