80C187 Datasheet, PDF (13/30 Pages) Intel Corporation – 80-BIT MATH COPROCESSOR

80C187
and exception When loading a signalling NaN
FLD single double precision signals an invalid-
operand exception
16 The 80C187 only generates quiet NaNs (as on
the 8087) however the 80C187 distinguishes
between quiet NaNs and signalling NaNs Sig-
nalling NaNs trigger exceptions when they are
used as operands quiet NaNs do not (except for
FCOM FIST and FBSTP which also raise IE for
quiet NaNs)
17 When stack overflow occurs during FPTAN and
overflow is masked both ST(0) and ST(1) con-
tain quiet NaNs The 8087 leaves the original
operand in ST(1) intact
18 When the scaling factor is g ^% the FSCALE
(ST(0) ST(1) instruction behaves as follows
(ST(0) and ST(1) contain the scaled and scaling
operands respectively)
 FSCALE (0 ^%) generates the invalid opera-
tion exception
 FSCALE (finite ^b%) generates zero with the
same sign as the scaled operand
 FSCALE (finite ^{a %}) generates ^% with the
same sign as the scaled operand
The 8087 returns zero in the first case and rais-
es the invalid-operation exception in the other
cases
19 The 80C187 returns signed infinity zero as the
unmasked response to massive overflow under-
flow The 8087 supports a limited range for the
scaling factor within this range either massive
overflow underflow do not occur or undefined
results are produced
Pin
Name
CLK
CKM
RESET
PEREQ
BUSY
ERROR
D₁₅ – D₀
NPRD
NPWR
NPS1
NPS2
CMD0
CMD1
V_CC
V_SS
Table 7 Pin Summary
Function
CLocK
ClocKing Mode
System reset
Processor Extension
REQuest
Busy status
Error status
Data pins
Numeric Processor ReaD
Numeric Processor WRite
NPX select 1
NPX select 2
CoMmanD 0
CoMmanD 1
System power
System ground
Active
State
High
High
High
Low
High
Low
Low
Low
High
High
High
Input
Output
I
I
I
O
O
O
IO
I
I
I
I
I
I
I
I
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