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80C196EA Datasheet, PDF (45/46 Pages) Intel Corporation – CHMOS 16-BIT MICROCONTROLLER | |||
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8xC196EA â AUTOMOTIVE
Table 19. Revision History (rev. 001 - 002)
Item
Description
Data Sheet
Status changed from âProduct Previewâ to âAdvance Informationâ.
Cover
The frequency designation was changed from 32 MHz to 40 MHz.
âDC Characteristicsâ on page -17
The following DC characteristics specifications were either
changed or added:
âAC Characteristics â Multiplexed Bus
Modeâ on page -19
⢠ICC (max)
⢠IIDLE (max)
⢠IOH2
⢠IOH3
The following AC characteristics multiplexed bus mode specifica-
tions were changed:
âAC Characteristics â Demultiplexed
Bus Modeâ on page -23
⢠TCHCL (max)
⢠TLLCH
(min/max)
⢠TRLCL (max)
⢠TCHWH (min)
⢠TWHLH (max)
⢠TAVYV (max)
⢠TCLYX (max)
⢠TWHQX (min)
⢠TLLAX (min)
⢠TRLDV (max)
The following AC characteristics demultiplexed bus mode speci-
fications were changed:
⢠TAVDV (max)
⢠TRLDV (max)
⢠TSLDV (max)
⢠TCHDV (max)
⢠TXHCH
min/(max)
⢠TCHCL
(min/max)
⢠TCLLH
(min/max)
⢠TRLCL (min)
⢠TRLRH (min)
⢠TRHLH (max)
⢠TWLCL (min)
⢠TQVWH (min)
⢠TCHWH (min)
⢠TWLWH (min)
⢠TWHQX (max)
⢠TWHBX (min)
⢠TRHBX (min)
⢠TAVYV (max)
⢠TCLYX (max)
âAC Characteristics â Demultiplexed
Bus Modeâ on page -23
The following AC characteristics demultiplexed bus mode speci-
fications were removed:
Figure 6 on page -25
⢠TLLCH
⢠TLHLH
⢠TLHLL
⢠TWHLH
Address out line in the System Bus Timing Diagram (Demulti-
plexed Bus Mode) was corrected from A20:16 to A20:0.
Figure 5 on page -22
TCHYX (max) timing was corrected in the Ready Timing Diagram to
show the rising edge of READY after the falling edge of CLKOUT.
HOLD#/HLDA# Timings
Section was removed, and all references to either HOLD# or
HLDA# were removed.
Table 11 on page -29
Synchronous Serial timing specifications changed in table.
âA/D Sample and Conversion Timesâ on A/D sample and conversion times example added.
page -30
Table 15 on page -33
Note 1 of the 8-bit mode A/D characteristics table changed to
state 20 mV, instead of 5 mV.
ADVANCE INFORMATION
39
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