80C196EA Datasheet, PDF (17/46 Pages) Intel Corporation – CHMOS 16-BIT MICROCONTROLLER

Name
P5.7:0
P7.7:0
P8.7:0
P9.7:0
P10.5:0
P11.7:0
P12.4:0
PLLEN
PWM7:0
8xC196EA — AUTOMOTIVE
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
Table 4. Signal Descriptions (Sheet 5 of 8)
Description
Port 5
This is a memory-mapped, 8-bit, bidirectional port that is multiplexed with indi-
vidually selectable control signals. P5.4 is multiplexed with TMODE#. If this pin
is held low during reset, the device will enter a test mode. To prevent inadvert-
ent entry into a reserved test mode, either configure this pin as an output or
hold it high during reset and ensure that your system meets the V_IH specifica-
tion.
Port 5 shares package pins with the following signals: P5.0/ALE, P5.1/INST,
P5.2/WR#/WRL#, P5.3/RD#, P5.4/BREQ#/TMODE#, P5.5/BHE#/WRH#,
P5.6/READY, and P5.7/RPD.
Port 7
This is a standard, 8-bit, bidirectional port that is multiplexed with individually
selectable special-function signals.
Port 7 shares package pins with the following signals: P7.0/EPA0/T1CLK,
P7.1/EPA1/T1RST, P7.2/EPA2/T2CLK, P7.3/EPA3/T2RST,
P7.4/EPA4/T3CLK, P7.5/EPA5/T3RST, P7.6/EPA6/T4CLK, and
P7.7/EPA7/T4RST.
Port 8
This is a standard, 8-bit, bidirectional port that is multiplexed with individually
selectable special-function signals.
P8.7:0 share package pins with EPA15:8.
Port 9
This is a standard, 8-bit, bidirectional port that is multiplexed with individually
selectable special-function signals.
P9.7:0 share package pins with OS7:0.
Port 10
This is a standard, 6-bit, bidirectional port that is multiplexed with individually
selectable special-function signals.
Port 10 shares package pins with the following signals: P10.0/SC0, P10.1/SD0,
P10.2/SC1, P10.3/SD1, P10.4/EPA16, and P10.5.
Port 11
This is a standard, 8-bit, bidirectional port that is multiplexed with individually
selectable special-function signals.
P11.7:0 share package pins with PWM7:0.
Port 12
This is a memory-mapped, 5-bit, bidirectional port. P12.2:0 select the test-ROM
execution mode.
Phase-locked Loop Enable
This active-high input pin enables the on-chip clock doubler.
This pin must be held low when entering on-circuit emulation (ONCE) mode.
Pulse Width Modulator Outputs
These are PWM output pins with high-current drive capability.
PWM7:0 share package pins with P11.7:0.
ADVANCE INFORMATION
11