80C196EA Datasheet, PDF (25/46 Pages) Intel Corporation – CHMOS 16-BIT MICROCONTROLLER

8xC196EA — AUTOMOTIVE
6.2 AC Characteristics — Multiplexed Bus Mode
Test Conditions: Capacitive load on all pins = 50 pF, Rise and Fall Times = 3 ns.
Table 7. AC Characteristics, Multiplexed Bus Mode (Sheet 1 of 2)
Symbol
Parameter
Min
Max
Units
F_XTAL1
Frequency on XTAL1, PLL in 1x mode
Frequency on XTAL1, PLL in 2x mode
20
40
MHz (1, 8)
10
20
MHz (8)
f
Operating frequency, f = F_XTAL1; PLL in 1x mode
Operating frequency, f = 2F_XTAL1; PLL in 2x mode
20
40
MHz (8)
t
Period, t = 1/f
25
50
ns
T_AVDV Address Valid to Input Data Valid
3t – 40
ns (2)
T_RLDV RD# Low to Input Data Valid
t – 18
ns (2)
T_CHDV CLKOUT High to Input Data valid
2t – 35
ns (9)
T_RHDZ RD# High to Input Data Float
t+5
ns
T_RXDX Data Hold after RD# Inactive
0
ns
T_XHCH XTAL1 Rising Edge to CLKOUT High or Low
3
50
ns (9)
T_CLCL
CLKOUT Cycle Time
2t
ns (9)
T_CHCL CLKOUT High Period
t – 10
t + 10
ns (9)
T_CLLH
CLKOUT Falling to ALE Rising
– 10
10
ns (9)
T_LLCH
ALE Falling to CLKOUT Rising
– 10
10
ns (9)
T_LHLH
ALE Cycle Time
4t
ns (2)
T_LHLL
ALE High Period
t – 10
t + 10
ns
T_AVLL
Address Setup to ALE Low
t – 15
ns
T_LLAX
Address Hold after ALE Low
t – 15
ns
T_LLRL
ALE Low to RD# Low
t – 15
ns
T_RLCL
RD# Low to CLKOUT Low
– 10
10
ns (9)
T_RLRH RD# Low to RD# High
t – 12
ns (2)
T_RHLH RD# High to ALE Rising
t–5
t + 15
ns (3)
NOTES:
1. 20 MHz is the maximum input frequency when using an external crystal oscillator; however, 40 MHz
can be applied with an external clock source.
2. If wait states are used, add 2t × n, where n = number of wait states.
3. Assuming back-to-back bus cycles.
4. When forcing wait states using the BUSCON register, add 2t × n.
5. Exceeding the maximum specification causes additional wait states.
6. 8-bit bus only.
7. The first falling edge of READY is not synchronized to a CLKOUT edge; therefore, one programmed
wait state is required.
8. Device is static by design but has been tested only down to 20 MHz.
9. Assumes CLKOUT is operating in divide-by-two mode (f/2).
ADVANCE INFORMATION
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