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XC2269I Datasheet, PDF (92/134 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller
XC2269I
XC2000 Family Derivatives / Premium Line
Electrical Parameters
Sample time and conversion time of the XC2269I’s A/D converters are programmable.
The timing above can be calculated using Table 23.
The limit values for fADCI must not be exceeded when selecting the prescaler value.
Table 23 A/D Converter Computation Table
GLOBCTR.5-0 A/D Converter
INPCRx.7-0
Sample Time1)
(DIVA)
Analog Clock fADCI
(STC)
tS
000000B
fSYS
00H
tADCI × 2
000001B
fSYS / 2
01H
tADCI × 3
000010B
fSYS / 3
02H
tADCI × 4
:
fSYS / (DIVA+1)
:
tADCI × (STC+2)
111110B
fSYS / 63
FEH
tADCI × 256
111111B
fSYS / 64
FFH
tADCI × 257
1) The selected sample time is doubled if broken wire detection is active (due to the presampling phase).
Converter Timing Example A:
Assumptions: fSYS
Analog clock
fADCI
Sample time
tS
Conversion 12-bit:
tC10
Conversion 10-bit:
tC8
= 128 MHz (i.e. tSYS = 7.8 ns), DIVA = 06H, STC = 00H
= fSYS / 7 = 18.3 MHz, i.e. tADCI = 54.7 ns
= tADCI × 2 = 109.4 ns
= 16 × tADCI + 2 × tSYS = 16 × 54.7 ns + 2 × 7.8 ns = 0.891 μs
= 12 × tADCI + 2 × tSYS = 12 × 54.7 ns + 2 × 7.8 ns = 0.672 μs
Converter Timing Example B:
Assumptions: fSYS
Analog clock
fADCI
Sample time
tS
Conversion 12-bit:
tC10
Conversion 10-bit:
tC8
= 40 MHz (i.e. tSYS = 25 ns), DIVA = 02H, STC = 03H
= fSYS / 3 = 13.3 MHz, i.e. tADCI = 75 ns
= tADCI × 5 = 375 ns
= 19 × tADCI + 2 × tSYS = 19 × 75 ns + 2 × 25 ns = 1.475 μs
= 15 × tADCI + 2 × tSYS = 15 × 75 ns + 2 × 25 ns = 1.175 μs
Data Sheet
92
V1.3, 2014-07