XC2269I Datasheet, PDF (68/134 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2269I
XC2000 Family Derivatives / Premium Line
Functional Description
3.18
Parallel Ports
The XC2269I provides up to 76 I/O lines which are organized into 7 input/output ports
and 2 input ports. All port lines are bit-addressable, and all input/output lines can be
individually (bit-wise) configured via port control registers. This configuration selects the
direction (input/output), push/pull or open-drain operation, activation of pull devices, and
edge characteristics (shape) and driver characteristics (output current) of the port
drivers. The I/O ports are true bidirectional ports which are switched to high impedance
state when configured as inputs. During the internal reset, all port pins are configured as
inputs without pull devices active.
All port lines have alternate input or output functions associated with them. These
alternate functions can be programmed to be assigned to various port pins to support the
best utilization for a given application. For this reason, certain functions appear several
times in Table 10.
All port lines that are not used for alternate functions may be used as general purpose
I/O lines.
Table 10 Summary of the XC2269I’s Ports
Port
P0
P1
P2
P4
P5
P6
P7
P10
P15
Width I/O Connected Modules
8
I/O EBC (A7...A0), CCU6, USIC, CAN
8
I/O EBC (A15...A8), CCU6, USIC
14
I/O EBC (READY, BHE, A23...A16, AD15...AD13, D15...D13),
CAN, CC2, GPT12E, USIC, DAP/JTAG
4
I/O EBC (CS3...CS0), CC2, CAN, GPT12E, USIC
11
I Analog Inputs, CCU6, DAP/JTAG, GPT12E, CAN
3
I/O ADC, CAN, GPT12E
5
I/O CAN, GPT12E, SCU, DAP/JTAG, CCU6, ADC, USIC
16
I/O EBC (ALE, RD, WR, AD12...AD0, D12...D0), CCU6, USIC,
DAP/JTAG, CAN, ERAY
5
I Analog Inputs, GPT12E
Data Sheet
68
V1.3, 2014-07